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Analog-to-Digital

Converter (ADC)

Section 16. Analog-to-Digital Converter (ADC)

HIGHLIGHTS

This section of the manual contains the following major topics:

16.1 Introduction .................................................................................................................. 16-2

16.2 Control Registers .........................................................................................................16-6

16.3 Overview of Sample and Conversion Sequence ....................................................... 16-17

16.4 ADC Configuration ..................................................................................................... 16-28

16.5 ADC Interrupt Generation ..........................................................................................16-35

16.6 Analog Input Selection for Conversion....................................................................... 16-37

16.7 Specifying Conversion Results Buffering for Devices with DMA and with ADC DMA Enable

Bit (ADDMAEN) Set ................................................................................................... 16-52

16.8 ADC Configuration Example ...................................................................................... 16-56

16.9 ADC Configuration for 1.1 Msps ................................................................................ 16-57

16.10 Sample and Conversion Sequence Examples for Devices without DMA and for Devices

with DMA but with ADC DMA Enable Bit (ADDMAEN) Clear .................................... 16-59

16.11 Sample and Conversion Sequence Examples for Devices with DMA and with ADDMAEN

Bit Set ........................................................................................................................ 16-71

16.12 Configuration Examples for Devices with Internal Op Amps ..................................... 16-81

16.13 Analog-to-Digital Sampling Requirements ................................................................. 16-84

16.14 Reading the ADC Result Buffer ................................................................................. 16-85

16.15 Transfer Functions ..................................................................................................... 16-87

16.16 ADC Accuracy/Error................................................................................................... 16-89

16.17 Connection Considerations........................................................................................ 16-89

16.18 Operation During Sleep and Idle Modes.................................................................... 16-89

16.19 Effects of a Reset....................................................................................................... 16-90

16.20 Design Tips ................................................................................................................ 16-91

16.21 Related Application Notes.......................................................................................... 16-92

16.22 Revision History ......................................................................................................... 16-93

dsPIC33E/PIC24E Family Reference Manual

16.1 INTRODUCTION

This document describes the features and associated operational modes of the Successive

Approximation (SAR) Analog-to-Digital Converter (ADC) modules available on the

dsPIC33E/PIC24E families of devices.

This ADC module can be configured by the user application to function as a 10-bit, 4-channel

ADC or a 12-bit, single channel ADC.

On devices with Direct Memory Access (DMA), this ADC module can be configured to use DMA

or use a dedicated, 16-word memory mapped buffer instead of DMA.

An ADC module block diagram for devices without op amps is provided in Figure 16-1. The ADC

module block diagram for devices with op amps is provided in Figure 16-2.

The following key features are common to all dsPIC33E/PIC24E devices:

• SAR conversion

• Up to 1.1 Msps conversion speed in 10-bit mode

• Up to 500 ksps conversion speed in 12-bit mode

• Up to 32 analog input pins

• External voltage reference input pins

• Four unipolar, differential Sample-and-Hold (S&H) amplifiers

• Simultaneous sampling of up to four analog input pins

• Automatic Channel Scanning mode

• Selectable conversion trigger source

• Up to 16-word conversion result buffer

• Operation during CPU Sleep and Idle modes

Additional features are available on select dsPIC33E/PIC24E devices:

• Connections for up to three internal op amps (not available on all devices)

• Connections to the Charge Time Measurement Unit (CTMU) and temperature

measurement diode (not available on all devices)

• Channel selection and triggering can be controlled by the Peripheral Trigger Generator

(PTG) (not available on all devices)

• Selectable Buffer Fill modes (not available on all devices)

• DMA support, including Peripheral Indirect Addressing (PIA) (not available on all devices)

Depending on the device variant, the ADC module may have up to 49 analog input pins, designated

AN0-AN48, and four op amp outputs, designated OA1-OA3 and OA5. These analog inputs and

op amp outputs are connected by multiplexers to four S&H amplifiers, designated CH0-CH3. The

analog input multiplexers have two sets of control bits, designated as MUXA (CHySA/CHyNA) and

MUXB (CHySB/CHyNB). These control bits select a particular analog input for conversion. The

MUXA and MUXB control bits can alternatively select the analog input for conversion. Unipolar

differential conversions are possible on all channels using certain input pins.

Note: This family reference manual section is meant to serve as a complement to device

data sheets. Depending on the device variant, this manual section may not apply to

all dsPIC33E/PIC24E devices.

Please consult the note at the beginning of the “Analog-to-Digital Converter

(ADC)” chapter in the current device data sheet to check whether this document

supports the device you are using.

Device data sheets and family reference manual sections are available for

download from the Microchip Worldwide Web site at: http://www.microchip.com

Note: Op amps are not available on all devices. Refer to the “Op Amp/Comparator”

chapter in the specific device data sheet for availability.

Note: Refer to the “Analog-to-Digital Converter (ADC)” chapter in the specific device

data sheet to determine the availability of these additional features.

Section 16. Analog-to-Digital Converter (ADC)

Analog-to-Digital

Converter (ADC)

Channel Scanning mode can be enabled for the CH0 S&H amplifier. Any subset of the analog

inputs or op amp outputs (based on availability) can be selected by the user application. The

selected inputs are converted in ascending order using CH0.

The ADC module supports simultaneous sampling using multiple S&H channels to sample the

inputs at the same time, and then performs the conversion for each channel sequentially. By

default, the multiple channels are sampled and converted sequentially.

For devices with DMA and with the ADC DMA Enable bit (ADDMAEN) set, the ADC module is

connected to a single-word result buffer. However, multiple conversion results can be stored in a

DMA RAM buffer with no CPU overhead when DMA is used with the ADC module. Each

conversion result is converted to one of four 16-bit output formats when it is read from the buffer.

For devices without DMA, and for devices with DMA that have the ADC DMA Enable bit

(ADDMAEN) clear, the ADC module is connected to a 16-word result buffer. The ADC result is

available in four different numerical formats (see Figure 16-14).

Note 1: A ‘y’ is used with MUXA and MUXB control bits to specify the S&H channel

numbers (y = 0 or 123). Refer to Section 16.6.2 “Alternate Input Selection

Mode” for more details.

2: Depending on a particular device pinout, the ADC can have up to 49 analog input

pins, designated AN0 through AN48, and four op amp outputs, designated

OA1-OA3 and OA5. In addition, there are two analog input pins for external voltage

reference connections (VREF+, VREF-). These analog inputs are shared with

op amp inputs and outputs, comparator inputs, and external voltage references.

When op amp/comparator functionality is enabled or an external voltage reference

is used, the analog input that shares that pin is no longer available. The actual

number of analog input pins and external voltage reference input configuration

depends on the specific device. For more details, refer to the specific device

data sheet.

Produktspecifikationer

Varumärke:	Microchip
Kategori:	Inte kategoriserad
Modell:	PIC24EP64GP202

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