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USER’S MANUAL
Revision 1.0
X11DPU-Z+

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes
no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:
For the most up-to-date version of this manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.
IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER
MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED
OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the
State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See ”.www.dtsc.ca.gov/hazardouswaste/perchlorate
WARNING: Handling of lead solder materials used in this product may expose you to lead, a
chemical known to the State of California to cause birth defects and other reproductive harm.
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical
systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic
property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully
indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Manual Revision 1.0
Release Date: October 13, 2017
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this
document. Information in this document is subject to change without notice. Other products and companies referred
to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2017 by Super Micro Computer, Inc.
All rights reserved.
Printed in the United States of America

3
Preface
Preface
About This Manual
This manual is written for system integrators, IT technicians, and knowledgeable end users.
It provides information for the installation and use of the X11DPU-Z+ motherboard.
About This Motherboard
The Super X11DPU-Z+ motherboard supports dual Intel® 81xx/61xx/51xx/41xx/31xx
(Socket P) processors with a Thermal Design Power (TDP) of up to 205W, and
three Ultra Path Interconnects (UPIs) with speeds of up to 10.4 GT/s (Note below).
With the Intel® C621 PCH built-in, this motherboard supports up to 3 TB of
3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM/NV-DIMM DDR4 ECC 2666/2400/2133 MHz in
24 DIMM slots with four Non-volatile Memory Express (NVMe) slots onboard. The X11DPU-Z+
provides the maximum system performance and I/O expandability currently available on the
market. This motherboard is optimized for PCI-E expansion with exible I/O support and
is ideal for use in High Performance Computing (HPC) and Enterprise Computing server
platforms. Please note that this motherboard is intended to be installed and serviced by
professional technicians only. For processor/memory updates, please refer to our website at
http://www.supermicro.com/products/.
Note: UPI/memory speeds are dependent on the processors installed in your system.
Manual Organization
Chapter 1 describes the features, specications and performance of the motherboard, and
provides detailed information on the C621 chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules, and other hardware components into the system.
If you encounter any problems, see , which describes troubleshooting procedures Chapter 3
for video, memory, and system setup stored in the CMOS.
Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.
Appendix A provides BIOS Error Beep Codes.
Appendix B lists software program installation instructions.
Appendix C lists standardized warning statements in various languages.
Appendix D provides UEFI BIOS Recovery instructions.

4
Super X11DPU-Z+ User's Manual
Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: marketing@supermicro.com (General Information)
support@supermicro.com (Technical Support)
Website: www.supermicro.com
Europe
Address: Super Micro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: +31 (0) 73-6400390
Fax: +31 (0) 73-6416525
Email: sales@supermicro.nl (General Information)
support@supermicro.nl (Technical Support)
rma@supermicro.nl (Customer Support)
Website: www.supermicro.nl
Asia-Pacic
Address: Super Micro Computer, Inc.
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 235
Taiwan (R.O.C)
Tel: +886-(2) 8226-3990
Fax: +886-(2) 8226-3992
Email: support@supermicro.com.tw
Website: www.supermicro.com.tw

5
Table of Contents
Table of Contents
Chapter 1 Introduction
1.1 Checklist ...............................................................................................................................8
1.2 Processor and Chipset Overview .......................................................................................18
1.3 Special Features ................................................................................................................19
1.4 System Health Monitoring ..................................................................................................19
1.5 ACPI Features ....................................................................................................................20
1.6 Power Supply .....................................................................................................................20
1.7 Super I/O ............................................................................................................................20
1.8 Advanced Power Management ..........................................................................................21
Intel® Intelligent Power Node Manager (IPNM).................................................................21
Management Engine (ME) ................................................................................................21
Chapter 2 Installation
2.1 Static-Sensitive Devices .....................................................................................................22
2.2 Motherboard Installation .....................................................................................................23
2.3 Processor and Heatsink Installation ...................................................................................25
The Intel 81xx/61xx/51xx/41xx/31xx Series Processors ...................................................25
Overview of the Processor Socket Assembly ...................................................................26
Overview of the Processor Heatsink Module (PHM) ........................................................27
Attaching the Non-F Model Processor to the Narrow Processor Clip to Create the
Processor Package Assembly ...........................................................................................28
Attaching the F Model Processor to the Narrow Processor Clip to Create the Processor
Package Assembly ............................................................................................................29
Attaching the Non-F Model Processor Package Assembly to the Heatsink to Form the
Processor Heatsink Module (PHM) ...................................................................................30
Attaching the F Model Processor Package Assembly to the Heatsink to Form the
Processor Heatsink Module (PHM) ...................................................................................31
Preparing the CPU Socket for Installation ........................................................................32
Removing the Dust Cover from the CPU Socket .............................................................32
Installing the Processor Heatsink Module (PHM) ............................................................33
Installing an HFI Carrier Card for Host Fabric Interface (HFI) Support as Needed
(Available when an F Model CPU is Used) ......................................................................34
Removing the Processor Heatsink Module (PHM) from the Motherboard .......................35
2.4 Memory Support and Installation .......................................................................................36
Memory Support ................................................................................................................36

6
Super X11DPU-Z+ User's Manual
DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx Processors .............37
DIMM Installation ..............................................................................................................38
DIMM Removal .................................................................................................................38
2.5 Rear I/O Ports ....................................................................................................................39
2.6 Front Control Panel ............................................................................................................43
2.7 Connectors .........................................................................................................................48
Power Connector ..............................................................................................................48
Headers .............................................................................................................................50
Host Fabric Interface (HFI) Carrier Card Sideband Headers (for the F Model CPU Only)..
..........................................................................................................................................51
2.7 Jumper Settings .................................................................................................................60
How Jumpers Work ...........................................................................................................60
2.8 LED Indicators ....................................................................................................................64
Chapter 3 Troubleshooting
3.1 Troubleshooting Procedures ..............................................................................................67
Before Power On ..............................................................................................................67
No Power ..........................................................................................................................67
No Video ...........................................................................................................................68
System Boot Failure .......................................................................................................68
Memory Errors ..................................................................................................................68
Losing the System's Setup Conguration .........................................................................69
When the System Becomes Unstable ..............................................................................69
3.2 Technical Support Procedures ...........................................................................................71
3.3 Frequently Asked Questions ..............................................................................................72
3.4 Battery Removal and Installation .......................................................................................73
Battery Removal ................................................................................................................73
Proper Battery Disposal ....................................................................................................73
Battery Installation .............................................................................................................73
3.5 Returning Merchandise for Service ....................................................................................74
Chapter 4 BIOS
4.1 Introduction .........................................................................................................................75
4.2 Main Setup .........................................................................................................................76
4.3 Advanced Setup Congurations .........................................................................................77
4.4 Event Logs .......................................................................................................................108
4.5 IPMI ..................................................................................................................................110

7
Table of Contents
4.6 Security Settings ..............................................................................................................113
4.7 Boot Settings ....................................................................................................................116
4.8 Save & Exit ....................................................................................................................... 118
Appendix A BIOS Codes
Appendix B Software Installation
Appendix C Standardized Warning Statements
Appendix D UEFI BIOS Recovery

8
Super X11DPU-Z+ User's Manual
Chapter 1
Introduction
Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.
In addition to the motherboard, several important parts that are included with your shipment
are listed below. If anything listed is damaged or missing, please contact your retailer.
1.1 Checklist
Important Links
For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.
• Supermicro product manuals: http://www.supermicro.com/support/manuals/
• Product drivers and utilities: ftp://ftp.supermicro.com
• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm
• If you have any questions, please contact our support team at: support@supermicro.com
This manual may be periodically updated without notice. Please check the Supermicro website
for possible updates to the manual revision level.
This motherboard was designed to be used in an SMCI-proprietary chassis as a part of an
integrate server platform solution. This motherboard is not intended to be sold as a standalone,
independent product. No shipping package will be provided in your shipment.

9
Chapter 1: Introduction
Figure 1-1. X11DPU-Z+ Motherboard Image
Note: All graphics shown in this manual were based upon the latest PCB revision
available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.

10
Super X11DPU-Z+ User's Manual
Figure 1-2. X11DPU-Z+ Motherboard Layout
(not drawn to scale)
Notes:
• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-
nections.
• " " indicates the location of Pin 1.
• Jumpers/components/LED indicators not indicated are used for internal testing only.
• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do
not install the onboard battery upside down to avoid possible explosion.
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2

11
Chapter 1: Introduction
Quick Reference
Notes:
• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-
nections.
• " " indicates the location of Pin 1.
• Jumpers/LED indicators not indicated are used for testing only.
• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do
not install the onboard battery upside down to avoid possible explosion.
BAR CODE
BIOS
LICENSE
IPMI CODE
X11DPU-Z+
REV:1.01
JP2
LEDM1
COM1
JUIDB2
IPMI LAN
USB2 (3.0)
S-SATA5
S-SATA4
SXB3B
JWD1
SXB3A
JRK1 RAID KEY-1
JSDCARD1
JVRM2
VGA
USB 0/1 (3.0)
JVRM1
LED1
JIPMB1
JPG1
JPW4
JPW3
JPW2
JPW1
FAN2
FAN1
FAN6
FAN5
FAN7
FAN8
P2-DIMMF1
P2-DIMME2
P2-DIMMF2
P2-DIMMD1
P2-DIMME1
P2-DIMMD2
P2-DIMMA2
P2-DIMMB1
P2-DIMMA1
P2-DIMMC2
P2-DIMMB2
P2-DIMMC1
P1-DIMMF1
P1-DIMME2
P1-DIMMF2
P1-DIMMD1
P1-DIMME1
P1-DIMMD2
P1-DIMMA2
P1-DIMMB1
P1-DIMMA1
P1-DIMMC2
P1-DIMMB2
P1-DIMMC1
BIOS
JBT1
JSD2
JSD1
SP1
JPME1
Battery
SXB3C
NVME11
NVME10
NVME13
JGPW2
JGPW4
LE2
JNVI2C2
JF1
JL1
JUSB3 (USB3/4)
JHFI2
JTPM1 (TPM / PORT 80)
I-SATA0~3
I-SATA4-7
SXB1C
SXB1B
SXB2
SXB1A
NVME12
PSU1
T-SGPIO3
JHFI1
PSU2
JNVI2C1
FAN3
FAN4

12
Super X11DPU-Z+ User's Manual
Quick Reference Table
Jumper Description Default Setting
JBT1 CMOS Clear Open (Normal) (See Chapter 2)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPME1 Manufacture Mode Select (ME Mode Select) Pins 1-2 (Normal)
JWD1 Watch Dog Timer Enable Pins 1-2 (Reset to System)
Connector Description
BT1 (Battery) Onboard CMOS battery
COM1 Back panel COM port
FAN1-8 4-pin system/CPU cooling fan headers (FAN8: a 4-pin vertical fan header)
IPMI_LAN Dedicated IPMI_LAN port
JF1 Front Panel Control header
JHFI1/JHFI2
(*Notes below)
Host Fabric Interface (HFI) sideband connection headers used for the HFI carrier cards (Available
when F model processors are installed; JHFI1: for CPU1, JHFI2: for CPU2) (See Notes below.)
I-SATA0-3, I-SATA4-7 SATA 3.0 connections 0-3, 4-7 supported by the Intel PCH
JIPMB1 4-pin BMC external I2C header (for an IPMI-supported card)
JL1 Chassis intrusion header
JNVI2C1/JNVI2C2
NVMe SMBus (I2C) headers used for PCI-E hot-plug SMBus clock & data connections (an SMCI-
proprietary NVMe add-on card and cable are required for the NVME I
2C header. This feature is
available for a Supermicro complete system only.)
JP2 Complex Programmable Logical Device (CPLD) header
JGPW2/JGPW4 GPU power connectors (JGPW4: GPU Power Connector1/JGPW2: GPU Power Connector2)
JPW1/JPW2 8-pin power supply connectors for backplane devices
JPW3/JPW4 8-pin power supply connectors
JRK1 Intel RAID Key header used for NVMe Solid State Devices (SSD)
JSD1/JSD2 Power connectors used for SATA DOM (Disk_on-Module) devices
JSDCARD1 Solid State Device (SSD) add-on card header
JTPM1 Trusted Platform Module (TPM)/Port 80 connector
NVME10/JNVME11 NVMe Connector1/NVMe Connector2 for CPU1
NVME12/JNVME13 NVMe Connector1/NVMe Connector2 for CPU2
PSU1/PSU2 Power supply unit 1/power supply unit 2 reserved for Supermicro system use
SP1 Internal speaker/buzzer
Notes: 1. For the HFI sideband carrier cards to function properly, please install a Host
Fabric Interface (HFI) card to an appropriate PCI-E slot of your choice, and install an
F model processor to the corresponding socket (JHFI1: for CPU1, JHFI2: for CPU2.
When one F model is used, be sure to install it on CPU Socket#1.) 2. Connect an HFI
cable from the HFI card to JHFI (HFI header) and connect an IFP cable from HFI card
to the processor. (See Pages 34 and 51 in Chapter 2 for more information.)

13
Chapter 1: Introduction
Connector Description
S-SATA4/S-SATA5 Powered S-SATA ports 4/5 with power pins built-in and with support of Supermicro SuperDOM
(Disk On Module) devices
SXB1A/SXB1B/SXB1C PCI-Express 3.0 (x16+x16) slots supported by CPU2 for Supermicro proprietary riser card (w/left
riser card support)
SXB2 PCI-Express 3.0 x8 (in x16) slot for center right riser card slot
SXB3A/SXB3B/SXB3C PCI-Express 3.0 x16+x16+x8 slots far right ultra riser card w/support of SAS3 AOM and LAN
options (via four NVMe ultra riser cards)
T-SGPIO3 Serial Link General Purpose I/O (GPIO) port
UID (JUIDB2) Unit Identier (UID) switch
USB0/1 (USB 3.0) Back panel USB 3.0 ports
USB2 (USB 3.0) Type A USB 3.0 header (JUSBA1)
USB3/4 (3.0) USB header for two USB 3.0 connections 3/4 for front access (JUSB3)
VGA VGA Port
LED Description Status
LED1 UID (Unit Identier) LED Solid Blue: Unit identied
LE2 Onboard Power LED On: Onboard power on
LEDM1 BMC Heartbeat LED Blinking Green: BMC normal

14
Super X11DPU-Z+ User's Manual
Motherboard Features
CPU
• This motherboard supports dual 81xx/61xx/51xx/41xx/31xx Socket P) socket processors which offer Intel UltraPath
Interconnect (UPI) of up to 10.4 GT/s
Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer
to the block diagram on page 18 to determine which slots or devices may be affected.
Memory
• Integrated memory controller embedded in the processor supports up to 3 TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/
RDIMM/NV-DIMM DDR4 ECC 2666/2400/2133 MHz in 24 DIMM slots.
DIMM Size
• Up to 128 GB at 1.2V
Note 1: Memory speed support depends on the processors used in the system.
Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/
motherboard.
Chipset
• Intel C621 PCH
Expansion Slots
• PCI-Express 3.0 (x16+x16) slots supported by CPU2 for left riser card use (SXB1A/SXB1B//SXB1C)
• PCI-Express 3.0 p14-x8 (in x16) slot for center right riser card slot (SXB2)
• PCI-Express 3.0 x16+x16+x8 slots far right ultra riser card (used for SAS3 AOM expansion and LAN options via NVMe
ultra riser card support) (SXB3A/SXB3B//SXB3C)
BaseBoard Management Controller (BMC)
• ASpeed AST 2500 Baseboard Controller (BMC) supports IPMI 2.0
• One (1) Dedicated IPMI LAN located on the rear IO back panel
Graphics
• Graphics controller via AST 2500 BMC (BaseBoard Management Controller)
Network Connection
• Intel C621 supports two Gigabit LAN (1 GbE) ports on the X11DPU-Z+
• One IPMI-dedicated LAN supported by the AST2500 BMC
I/O Devices
• • Serial (COM) Port One (1) Fast UART 16550 port on the I/O back panel
• SATA 3.0
• Eight (8) SATA 3.0 ports supported by Intel PCH (I-SATA 0-3, I-SATA 4-7)
• Two (2) SATA 3.0 ports with power-pins built-in, w/support of Supermicro
SuperDOM (S-SATA4/S-SATA5)
• RAID • RAID 0, 1, 5, and 10
• NVMe • Four (4) NVMe (x4) PCI-E 3.0 slots
Motherboard Features

15
Chapter 1: Introduction
Motherboard Features
Peripheral Devices
• Two (2) USB 3.0 ports on the rear I/O panel (USB 0/1)
• One (1) Type A USB 3.O connection header (USB2)
• One (1) USB 3.0 header with two USB 3.0 connections (USB 3/4)
BIOS
• 32 MB SPI AMI BIOS® SM Flash UEFI BIOS
• ACPI 3.0/4.0, USB keyboard, Plug-and-Play (PnP), SPI dual/quad speed support, riser-card auto detection support, and
SMBIOS 2.7 or later
Power Management
• Main switch override mechanism
• Power-on mode for AC power recovery
• Intel® Intelligent Power Node Manager 4.0 (available when the Supermicro Power Manager [SPM] is installed and a
special power supply is used)
• Management Engine (ME)
System Health Monitoring
• Onboard voltage monitoring for +3.3V, 3.3V standby, +5V, +5V standby, +12V, CPU core, memory, chipset, BMC, PCH,
and battery voltages
• CPU System LED and control
• CPU Thermal Trip support
• Status monitor for speed control
• Status monitor for on/off control
• CPU Thermal Design Power (TDP) support of up to 205W (See Note 1 on next page.)
Fan Control
• Fan status monitoring via IPMI connections
• Dual cooling zone
• Low-noise fan speed control
• Pulse Width Modulation (PWM) fan control
System Management
• Trusted Platform Module (TPM) support
• PECI (Platform Environment Control Interface) 2.0 support
• UID (Unit Identication)/Remote UID
• System resource alert via SuperDoctor® 5
• SuperDoctor® 5, Watch Dog, NMI
• Chassis intrusion header and detection
LED Indicators
• CPU/Overheating
• Fan Failure
• UID/remote UID
• LAN activity
Dimensions
• 17.0" (L) x 16.8" (W) (431.80 mm x 426.72 mm)

16
Super X11DPU-Z+ User's Manual
Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chas-
sis and heatsink specications for proper CPU TDP sizing.
Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con-
guration User's Guide available at http://www.supermicro.com/support/manuals/.
Note 3: It is strongly recommended that you change BMC log-in information upon ini-
tial system power-on. The manufacture default username is ADMIN and the password
is ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com.

17
Chapter 1: Introduction
Note: This is a general block diagram and may not exactly represent the features on
your motherboard. See the previous pages for the actual specications of your moth-
erboard.
Figure 1-3.
System Block Diagram
DDR3 NCSI
VGA LAN
SPI
SPI
FLASH
SPI
SPI
PE [5]
PE [0..3]
SATA Gen3
[0..3]
SATA Gen3
[4..7]
sSATA Gen3
[0..3]
USB2.0
[8,9,10,12,13]
USB3.0
[1, 2, 3, 4, 6] DMI
sSATA Gen3 [4, 5]
USB2.0 [6,7]
LPC/eSPI
FLASH
TPM
Header
UART
PHY
RTL8211F IPMI LAN
RJ45
COM1
PE LPC/eSPI
SPI USB
HWM
BMC
AST2500
PCH
DDR4
VGA
64MB
BMC
32MB
BIOS MUX
WIO
Ultra IO
JS1
I-SATA0~3
LowerUpper
P2_NVMe1
P2_NVMe1
P2_NVMe1P2_NVMe1
Port A Port B Port B Port C Port C
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
DDR4 DIMM
NCSI
LowerUpper
JS2
I-SATA4~7
S-SATA5
S-SATA4
NIC
Port A
0~7
Port B
0~7
Port B
8~15
Port C
0~10
Port C
11~15
x4 x8
x4 x4
x4
x4
x4
x8
x8
x8
x8
3bit
5bit
x8
x4
x4
x8 + x8
x16
#2
#1
#2
#1
#2
PE1 PE2 PE3 UPI2 UPI1 UPI0 PE1
DMI
PE2 PE3 UPI2 UPI1 UPI0
#1
#2 #2
#1 #1
#2
#1
#2
#1
#2
#1
#2
#1
#2
#1
#2
#1
#2
#1
M
L
K G
H
J
A
B
C
D
HSSI
CPU1
Socket ID 01
HSSI
CPU0
Socket ID 00
10.4G/11.2G T/s
32GB/s
8GB/s
32GB/s
32GB/s
32GB/s
32GB/s
32GB/s
UPI
UPI
Polarity Inversion
10.4G/11.2G T/s
Polarity Inversion
REAR TYPE-A FRONT
port 0,1 port 3 port 3

18
Super X11DPU-Z+ User's Manual
1.2 Processor and Chipset Overview
Built upon the functionality and capability of the Intel Xeon 81xx/61xx/51xx/41xx/31xx
processors (Socket P) and the C621 chipset (Note below), this motherboard provides superb
system performance, efcient power management, and a rich feature set based on cutting
edge technology to address the needs of next-generation computer users. With support of
Intel® UltraPath Interconnect (UPI) of up to 10.4 GT/s, and Intel® AVX-512 new instructions,
this motherboard offers an innovative solution with maximum system performance to meet the
ongoing demands of High Performance Computing (HPC) and Enterprise Computing servers.
This motherboard is optimized for database, big data and MRP/ERP platforms.
The Intel Xeon 81xx/61xx/51xx/41xx/31xx processor and the C621 chipset support the
following features:
• Intel® AVX-512 support with memory bandwidth increase to 6 channels (x1.5 from the
previous generation)
• High availability interconnect between multiple nodes
• Rich set of available I/Os, full exibility in usage model, and software stack
• Dedicated subsystems for customer innovation
• Increased platform security with Intel® Boot Guard for hardware-based boot integrity pro-
tection; prevention of buffer overow class security threads
• Integrated solution for real-time compression, streaming write & read performance in-
creases from gen-to-gen
• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)
• Single standard server development (Accelerate NFV transition) consolidating application,
control, and data plane workloads, reducing total platform investment needs

19
Chapter 1: Introduction
1.3 Special Features
This section describes the health monitoring features of the X11DPU-Z+ motherboard. The
motherboard has an onboard ASpeed AST2500 Baseboard Management Controller (BMC)
that supports system health monitoring.
Recovery from AC Power Loss
The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.
1.4 System Health Monitoring
This section describes the health monitoring features of the X11DPU-Z+. The motherboard
has an onboard Baseboard Management Controller (BMC) chip that supports system health
monitoring. Once a voltage becomes unstable, a warning is given or an error message is
sent to the screen. The user can adjust the voltage thresholds to dene the sensitivity of the
voltage monitor.
Onboard Voltage Monitors
The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. The user
can adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time
readings of these voltage levels are all displayed in BIOS.
Fan Status Monitor with Firmware Control
The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.
Environmental Temperature Control
System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of
the CPU or the system exceeds a user-dened threshold, system/CPU cooling fans will be
turned on to prevent the CPU or the system from overheating.
Note: To avoid possible system overheating, please be sure to provide adequate air-
ow to your system.

20
Super X11DPU-Z+ User's Manual
System Resource Alert
This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the
user of certain system events. For example, you can congure SuperDoctor 5 to provide you
with warnings when the system temperature, CPU temperatures, voltages and fan speeds
go beyond a predened range.
1.5 ACPI Features
ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power
management features throughout a computer system including its hardware, operating system
and application software. This enables the system to automatically turn on and off peripherals
such as network cards, hard disk drives and printers.
In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent
interface for conguration control. ACPI leverages the Plug and Play BIOS data structures
while providing a processor architecture-independent implementation that is compatible with
Windows 10, and Windows 2012 operating systems.
1.6 Power Supply
As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates. In areas
where noisy power transmission is present, you may choose to install a line lter to shield
the computer from noise. It is recommended that you also install a power surge protector to
help avoid problems caused by power surges.
1.7 Super I/O
The Super I/O (ASpeed AST2500 chip) provides a high-speed, 16550 compatible serial
communication port (UART), which supports serial infrared communication. The UART
includes send/receive FIFO, a programmable baud rate generator, complete modem control
capability, and a processor interrupt system. The UART provides legacy speed with baud
rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or
1 Mb/s, supporting higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Conguration and Power
Interface), which includes support of legacy and ACPI power management through a SMI
or SCI function pin. It also features auto power management to reduce power consumption.

21
Chapter 1: Introduction
1.8 Advanced Power Management
The following new advanced power management features are supported by the motherboard.
Intel ® Intelligent Power Node Manager (IPNM)
Available when the Supermicro Power Manager (SPM) is installed, Intel's Intelligent Power
Node Manager (IPNM) provides your system with real-time thermal control and power
management for maximum energy efciency. Although IPNM Specication Version 2.0/3.0
is supported by the BMC (Baseboard Management Controller), your system must also have
IPNM-compatible Management Engine (ME) rmware installed to use this feature.
Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.
Management Engine (ME)
The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides
Server Platform Services (SPS) to your system. The services provided by SPS are different
from those provided by the ME on client platforms.

22
Supe X11DPU-Z+ User's Manual
Chapter 2
Installation
2.1 Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging
your motherboard and your system, it is important to handle it very carefully. The following
measures are generally sufcient to protect your equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic bag.
• Handle the board by its edges only; do not touch its components, peripheral chips, memory
modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when not in use.
• For grounding purposes, make sure that your chassis provides excellent conductivity be-
tween the power supply, the case, the mounting fasteners and the motherboard.
• Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do
not install the CMOS battery upside down, which may result in a possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

23
Chapter 2: Installation
BAR CODE
BIOS
LICENSE
IPMI CODE
X11DPU-Z+
REV:1.01
2.2 Motherboard Installation
All motherboards have standard mounting holes to t different types of chassis. Make sure
that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.
Location of Mounting Holes
Notes: 1) To avoid damaging the motherboard and its components, please do not use
a force greater than 8 lb/inch on each mounting screw during motherboard installation.
2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.
Phillips Screwdriver
(1)
Standoffs (14)
Only if Needed
Phillips Screws (14)
Tools Needed

24
Supe X11DPU-Z+ User's Manual
Installing the Motherboard
1. Install the I/O shield into the back of the chassis.
2. Locate the mounting holes on the motherboard. See the previous page for the location.
3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.
6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed in this manual are for illustration only. Your chassis or
components might look different from those shown in this manual.

25
Chapter 2: Installation
2.3 Processor and Heatsink Installation
Warning: When handling the processor package, avoid placing direct pressure on the label
area of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can
cause serious damage to the CPU or motherboard which may result in RMA repairs. Please
read and follow all instructions thoroughly before installing your CPU and heatsink.
Notes:
• Always connect the power cord last, and always remove it before adding, removing, or
changing any hardware components. Please note that the processor and heatsink should
be assembled together rst to form the Processor Heatsink Module (PHM), and then install
the entire PHM into the CPU socket.
• When you receive a motherboard without a processor pre-installed, make sure that the
plastic CPU socket cap is in place and that none of the socket pins are bent; otherwise,
contact your retailer immediately.
• Refer to the Supermicro website for updates on CPU support.
• Please follow the instructions given in the ESD Warning section on the rst page of this
chapter before handling, installing, or removing system components.
The Intel 81xx/61xx/51xx/41xx/31xx Series Processors
Note: All graphics, drawings, and pictures shown in this manual are for illustration only.
The components that came with your machine may or may not look exactly the same
as those shown in this manual.
Intel Processor (Non-F Model) Intel Processor (F Model)
Note: The 81xx/61xx/51xx/41xx/31xx processors contain two models-the F model pro-
cessors and the Non-F model processors. The installation instructions for the F model
processors differ from the installation instructions for the Non-F model processors. For
this reason, two sets of instructions (one for the F model, and the other, for the Non-
F model) are provided in this section.

26
Supe X11DPU-Z+ User's Manual
Overview of the Processor Socket Assembly
The processor socket assembly contains 1) the Intel 81xx/61xx/51xx/41xx/31xx processor,
2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.
3. Dust Cover
4. CPU Socket
1. The 81xx/61xx/51xx/41xx/31xx Processor
Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-
stalled.
2. Narrow processor clip (the plastic processor package carrier used for the CPU)
(The 81xx/61xx/51xx/41xx/31xx Processor)
(for the non-F Model)

27
Chapter 2: Installation
Overview of the Processor Heatsink Module (PHM)
The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip,
and 3) the 81xx/61xx/51xx/41xx/31xx processor.
1. Heatsink
2. Narrow processor clip
3. Intel Processor
Processor Heatsink Module (PHM)
(Bottom View for the non-F Model) (Bottom View for the F Model)

28
Supe X11DPU-Z+ User's Manual
Attaching the Non-F Model Processor to the Narrow Processor
Clip to Create the Processor Package Assembly
To properly install the CPU into the narrow processor clip, please follow the steps below.
1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.
2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.
3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.
4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.
Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.
Processor Package Carrier (w/CPU mounted
on the Processor Clip)
A
B
C
Allow Notch C to
latch on to CPU
Allow Notch B to
latch on to CPU
A
A
B
B
C
C
Pin 1
Align CPU Pin 1
CPU (Upside Down)
w/CPU LGA Lands up
CPU/Heatsink Package
(Upside Down)
Align Notch C of the CPU
and Notch C of the Processor Clip
Align Notch B of the CPU
and Notch B of the Processor Clip

29
Chapter 2: Installation
Attaching the F Model Processor to the Narrow Processor Clip
to Create the Processor Package Assembly
To properly install the CPU into the narrow processor clip, please follow the steps below.
1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.
2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.
3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.
4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.
Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.
Processor Package Carrier (w/CPU mounted on the
Processor Clip) A
B
D
Allow Notch D to
latch on to CPU
Allow Notch B to
latch on to CPU
Allow Notch C to
latch on to CPU
C
A
A
C
C
D
D
Pin 1
Align CPU Pin 1
Align Notch C of the CPU
and Notch C of the Processor Clip
Align Notch D of the CPU
and Notch D of the Processor Clip
CPU (Upside Down)
w/CPU LGA Lands up
CPU/Heatsink Package
(Upside Down)
B
B
Align Notch B of the CPU
and Notch B of the Processor Clip

30
Supe X11DPU-Z+ User's Manual
Attaching the Non-F Model Processor Package Assembly to the
Heatsink to Form the Processor Heatsink Module (PHM)
After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).
1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.
With your index nger pressing against the screw at this triangular corner, carefully hold
and turn the heatsink upside down with the thermal-grease side facing up. Remove the
protective thermal lm if present, and apply the proper amount of the thermal grease
as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)
2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
Heatsink
(Upside Down)
Non-Fabric CPU and Processor Clip
(Upside Down)
C
D
dc
a
b
A
B
On Locations of (C, D), the notches
snap onto the heat sink’s
mounting holes
On Locations (A, B), the notches
snap onto the heatsink’s sides
A
B
DC
Make sure Mounting
Notches snap into place
Triangle on the CPU
Triangle on the
Processor Clip
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).
3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.
4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").
5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).

31
Chapter 2: Installation
Attaching the F Model Processor Package Assembly to the
Heatsink to Form the Processor Heatsink Module (PHM)
After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).
1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.
With your index nger pressing against the screw at this triangular corner, carefully hold
and turn the heatsink upside down with the thermal-grease side facing up. Remove the
protective thermal lm if present, and apply the proper amount of the thermal grease
as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)
2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).
3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.
4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").
5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).
Heatsink
(Upside Down)
Fabric CPU and Processor Clip
(Upside Down)
C
D
dc
a
b
A
B
On Locations of (C, D), the notches
snap onto the heat sink’s
mounting holes
On Locations (A, B), the notches
snap onto the heatsink’s sides
A
B
DC
Triangle on the CPU
Triangle on the
Processor Clip
Make sure Mounting
Notches snap into place

32
Supe X11DPU-Z+ User's Manual
Preparing the CPU Socket for Installation
This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P0) socket, and 4) a back plate.
These components are pre-installed on the motherboard before shipping.
CPU Socket w/Dust Cover On
Dusk Cover
CPU Socket
Removing the Dust Cover from the CPU Socket
Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as
shown on the illustration below.
Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.
So Pincket s
Remove he du cove t st r from
the CPU socket. Do not
touch the socket pins!

33
Chapter 2: Installation
Installing the Processor Heatsink Module (PHM)
1. Once you have assembled the processor heatsink module (PHM) by following the
instructions listed on page 30 or page 31, you are ready to install the processor heatsink
module (PHM) into the CPU socket on the motherboard. To install the PHM into the
CPU socket, follow the instructions below.
2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the
corner of the PHM that is closest to "1." (If you have difculty locating pin 1 of the PHM,
turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow
triangle located next to a screw at the corner. Turn the PHM right side up, and you will
see a triangle marked on the processor clip at the same corner of hollow triangle.)
3. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the
CPU socket.
4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into
the guiding posts.
5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the
socket to securely attach the PHM onto the motherboard starting with the screw marked
"1" (in the sequence of 1, 2, 3, and 4).
Note: Do not use excessive force when tightening the screws to avoid damaging the
LGA-lands and the processor.
#1 #2
#3
#4
Small Guiding Post
Large Guiding PostOval D
T30 Torx Driver
Use a torque
of 12 lbf
Oval C
Printed Triangle
Mounting the Processor Heatsink Module
into the CPU socket (on the motherboard)
T e screws in theighten th
sequence of 1, 2, 3, 4 (top 3 quarter view)

34
Supe X11DPU-Z+ User's Manual
Installing an HFI Carrier Card for Host Fabric Interface (HFI)
Support as Needed (Available when an F Model CPU is Used)
Note: Two host fabric interface carrier card headers (JHFI1/JHFI2) are located on the
motherboard. JHFI1 is used for CPU1; JHFI2, for CPU2. If one F model CPU is used,
install it on CPU Socket#1 rst. Following the steps below to enable HFI support for
CPU1. If needed, repeat the same steps to enable HFI support for CPU2. (For more
information on the JHFI1/JFHI2 headers, please refer to page 51.)
Installation Instructions
1. Locate CPU Socket#1 on the motherboard. Install an F model CPU on CPU Socket#1.
(For CPU2 HFI support, install an F model CPU on Socket#2.)
2. Locate the PCI-E slots the motherboard. Install a Host Fabric Interface (HFI) card on a
PCI-E slot supported by CPU1. (For CPU2 HFI support, install an HFI card on a PCI-E
slot supported by CPU2.)
3. Connect the HFI connector on the HFI cable to the onboard JHFI1 header as show
below (marked 3 below.) (Connect the HFI cable to JHFI2 for CPU2 HFI support.)
4. Connect the other end of the HFI cable to the connector (marked
A
) on the HFI card as
shown below. (Marked 4 below.)
5. Connect the plug (marked 5) on one end of the Internal_Faceplate_to_the_Processor
(IFP) cable to the connector (marked ) on the HFI card as shown below.
6. Connect the other end of IFP cable (marked 6) to the F model CPU installed in the CPU
as shown below. Repeat the same steps to enable HFI support for CPU2.
B
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
JVRM1
JVRM2
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1ASXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
JH HeaFI1 der
(for CPU1)
B
A
JHFI1
JH HeaFI2 der
(for CPU2)
3
4
6
5
1
F Model
Processor
H o FabricFI (H st
Interface) Sideband
Cable
HFI Carrier
Card
3. Connect the HFI rconnecto
on the HFI cable to the
onboard JHFI1 header.
IFP Cable (Optional)
Install an F model CPU
on Socket#1 (and another
F model CPU on Socket#2 if needed.
Then repeat Step 1 to Step 6
for HFI support for CPU2.)
2
2. Install an HFI card to a PCI-E slot
4. Connect another end of
the HFI cable to the
connector (A)
of the HFI card.
5. Connect one end of
the IFP cable to the
connector (B)
of the HFI card.
6. Connect the other end of
the IFP cable to the
F model CPU.

35
Chapter 2: Installation
Printed Triangle on Motherboard
Removing the screws in
the sequence of 4, 3, 2, 1
#1 #2
#3
#4
After removing the screws,
lift the Processor Heatsink
Module off the CPU socket.
CPU Socket
Removing the Processor Heatsink Module (PHM) from the
Motherboard
Before removing the processor heatsink module (PHM), unplug power cord from the power
outlet.
1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to
loosen them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2,
1).
2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it
from the socket.
Note: To properly remove the processor heatsink module, be sure to loosen and re-
move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

36
Supe X11DPU-Z+ User's Manual
Memory Support
The motherboard supports up to 3 TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM/NV-
DIMM DDR4 ECC 2666/2400/2133 MHz in 24 DIMM slots. The black DIMM slots are reserved
for future NVDIMM support. Populating the DIMM slots in a 2DPC (two DIMMs per channel)
conguration with pairs of memory modules of the same type, speed and size will result in
interleaved memory, which improves performance.
Notes: 1. When installing DIMMs in a 2DPC memory conguration, rst populate the
blue memory slot, which is the rst slot of a channel, followed by the black slot. 2. Using
an unbalanced memory topology by installing two DIMMs in one channel while installing
one DIMM in another channel will result in reduced memory performance. 3. Memory
speed is dependent on the type of processors used in your system.
2.4 Memory Support and Installation
Notes: Check the Supermicro website for recommended memory modules. Exercise
extreme care when installing or removing DIMM modules to prevent any damage.
DDR4 Memory Support (for 1-Slot Per-Channel Conguration)
Type
Ranks
Per
DIMM
and Data
Width
DIMM Capacity
(GB)
Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)
1 Slot per Channel
1DPC (1-DIMM per Channel)
4 Gb 8 Gb 1.2 V
RDIMM SRx4 8 GB 16 GB 2666
RDIMM SRx8 4 GB 8 GB 2666
RDIMM DRx8 8 GB 16 GB 2666
RDIMM DRx4 16 GB 32 GB 2666
RDIMM 3Ds QRX4 N/A 2H-64GB 2666
RDIMM 3Ds 8RX4 N/A 4H-128GB 2666
LRDIMM QRx4 32 GB 64 GB 2666
LRDIMM 3Ds
QRX4 N/A 2H-64GB 2666
8Rx4 N/A 4H-128 GB 2666
DDR4 Memory Support (for 2-Slot Per-Channel Conguration)
Type
Ranks
Per
DIMM
and Data
Width
DIMM Capacity
(GB)
Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)
2 Slots per Channel
1DPC (1-DIMM per Channel) 2DPC (2-DIMM per Channel)
4 Gb 8 Gb 1.2 V 1.2 V
RDIMM SRx4 8 GB 16 GB 2666 2666
RDIMM SRx8 4 GB 8 GB 2666 2666
RDIMM DRx8 8 GB 16 GB 2666 2666
RDIMM DRx4 16 GB 32 GB 2666 2666
RDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666
RDIMM 3Ds 8RX4 N/A 4H-128GB 2666 2666
LRDIMM QRx4 32 GB 64 GB 2666 2666
LRDIMM 3Ds
QRX4 N/A 2H-64GB 2666 2666
8Rx4 N/A 4H-128 GB 2666 2666

37
Chapter 2: Installation
DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx
Processors
For optimal memory performance, follow the tables below when populating memory modules.
Key Parameters for DIMM Congurations
Parameters Possible Values
Number of Channels 1, 2, 3, 4, 5, or 6
Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)
DIMM Type RDIMM (w/ECC), LRDIMM, 3DS-LRDIMM
DIMM Construction • non-3DS RDIMM Raw Cards: A/B (2RX4), C (1RX4),
D (1RX8), E (2RX8)
• 3DS RDIMM Raw Cards: A/B (4RX4)
• non-3DS LRDIMM Raw Cards: D/E (4RX4)
• 3DS LRDIMM Raw Cards: A/B (8RX4)
General Population Requirements
DIMM Mixing Rules
• Please populate all memory modules with DDR4 DIMMs only.
• X4 and X8 DIMMs can be mixed in the same channel.
• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different
channels, and across different sockets.
• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across
different channels, and across different sockets.
Mixing of DIMM Types within a Channel
DIMM Types RDIMM LRDIMM 3DS LRDIMM
RDIMM Allowed Not Allowed Not Allowed
LRDIMM Not Allowed Not AllowedAllowed
3DS LRDIMM Not Allowed Not Allowed Allowed

38
Supe X11DPU-Z+ User's Manual
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DIMM Installation
1. Insert DIMM modules in the following
order: P1-DIMMA1, P1-DIMMD1, P1-
DIMMB1, P1-DIMME1, and P1-DIMMC1,
P1-DIMMF1. For the system to work
properly, please use memory modules
of the same type and speed on the
motherboard.
2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.
3. Align the key of the DIMM module with the
receptive point on the memory slot.
4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.
5. Use two thumbs together to press the
notches on both ends of the module
straight down into the slot until the module
snaps into place.
6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.
DIMM Removal
Reverse the steps above to remove the DIMM
modules from the motherboard.
Release Tabs
Notches
Press both notches
straight down into
the memory slot.

39
Chapter 2: Installation
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2.5 Rear I/O Ports
See the layout below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.
Back panel I/O Port Locations and Denitions
6
No. Description No. Description
1. 4. COM1USB 0 (USB 3.0)
2. 5.USB 1 (USB 3.0) Unit Identier Switch (UID)
3. 6. VGAIPMI LAN
543
1
2

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VGA Port
The onboard VGA port is located next to the COM port on the I/O back panel. Use this
connection for VGA display.
1. VGA Port
2. COM1
Serial Port
There is one COM port (COM1) located next to the IPMI_LAN port on the I/O back panel.
The COM port provides serial communication support.
12

41
Chapter 2: Installation
Universal Serial Bus (USB) Ports
There are two USB 3.0 ports (USB0/1) on the I/O back panel. A USB header, located next to
the front control panel (JF1), provides two USB 3.0 connections (USB3/4) for front access.
USB2, a Type A USB header, also provides front USB 3.0 support. The onboard headers can
be used for front side USB access with appropriate cables (not included).
1. USB0 (3.0)
2. USB1 (3.0)
3. USB2: Type A (3.0)
4. USB3/4 (3.0)
3
Back Panel USB 0/1 (3.0)
Pin Denitions
Pin# Pin#Denition Denition
A1 VBUS B1 Power
A2 D- B2 USB_N
A3 D+ B3 USB_P
A4 GND B4 GND
A5 Stda_SSRX- B5 USB3_RN
A6 Stda_SSRX+ B6 USB3_RP
A7 GND B7 GND
A8 Stda_SSTX- B8 USB3_TN
A9 Stda_SSTX+ B9 USB3_TP
Front Panel USB 3/4 (3.0)
Pin Denitions
Pin# Pin#Denition Denition
1VBUS 19 Power
2Stda_SSRX- 18 USB3_RN
3Stda_SSRX+ 17 USB3_RP
4GND 16 GND
5Stda_SSTX- 15 USB3_TN
6Stda_SSTX+ 14 USB3_TP
7GND 13 GND
8D- 12 USB_N
9D+ USB_P11
10 x
Type A USB 2 (3.0)
Pin Denitions
Pin# Pin#Denition Denition
1 5VBUS SSRX-
2 6USB_N SSRX+
3 7USB_P GND
4 8Ground SSTX-
9 SSTX+
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4
1
2

42
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1. UID Indicator
2. Rear UID LED (next to UID
Switch)
3. Front UID LED (on JF1)
4. IPMI LAN
Unit Identier Switch/UID LED Indicator
A Unit Identier (UID) switch and a rear UID LED (LED1) are located on the I/O back panel.
A front UID switch is located on pins 7 & 8 of the front panel control (JF1). When you press
the front or the rear UID switch, both front and rear UID LEDs will be turned on. Press the
UID switch again to turn off the LED indicators. The UID indicators provide easy identication
of a system that may be in need of service. ( UID can also be triggered via IPMI on Note:
the motherboard. For more information, please refer to the IPMI User's Guide posted on our
website at http://www.supermicro.com.)
UID Switch
Pin Denitions
Pin# Denition
1 Ground
2 Ground
3 Button In
4 Button In
UID LED
Pin Denitions
Color Status
Blue: On Unit Identied
Power Button
UID LED
NIC1 Active LED
Reset Button
HDD LED
PWR LED
Reset
PWR
3.3V Stby
3.3V Stby
Ground
19
X
Ground
X
3.3V Stby
20
Ground
Power Fail LED
NIC2 Active LED
NMI
3.3V
3.3V
OH/Fan Fail LED
1
21
4
3

43
Chapter 2: Installation
Power Button
UID LED
NIC1 Active LED
Reset Button
HDD LED
PWR LED
Reset
PWR
3.3V Stby
3.3V Stby
Ground
19
X
Ground
X
3.3V Stby
20
1 2
Ground
Power Fail LED
NIC2 Active LED
NMI
3.3V
3.3V
OH/Fan Fail LED
Figure 2-3. JF1 Header Pins
2.6 Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a
control panel at the front of the chassis. These connectors are designed specically for use
with Supermicro chassis. See the gure below for the descriptions of the front control panel
buttons and LED indicators.
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44
Supe X11DPU-Z+ User's Manual
Power Button
UID LED
NIC1 Active LED
Reset Button
HDD LED
PWR LED
Reset
PWR
3.3V Stby
3.3V Stby
Ground
19
X
Ground
X
3.3V Stby
20
1 2
Ground
Power Fail LED
NIC2 Active LED
NMI
3.3V
3.3V
OH/Fan Fail LED
1
2
1. PWR Button
2. Reset Button
Reset Button
Pin Denitions (JF1)
Pins Denition
3 Reset
4 Ground
Power Button
Pin Denitions (JF1)
Pins Denition
1 Signal
2 Ground
Power Button
The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both
pins will power on/off the system. This button can also be congured to function as a suspend
button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system
is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for
pin denitions.
Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset
switch on the computer case to reset the system. Refer to the table below for pin denitions.

45
Chapter 2: Installation
Power Button
UID LED
NIC1 Active LED
Reset Button
HDD LED
PWR LED
Reset
PWR
3.3V Stby
3.3V Stby
Ground
19
X
Ground
X
3.3V Stby
20
1 2
Ground
Power Fail LED
NIC2 Active LED
NMI
3.3V
3.3V
OH/Fan Fail LED
1
2
Overheat/Fan Fail and UID LED
Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the UID/Overheat/
Fan Fail LED. UID LED indicates a unit that might need service is identied; while the OH/
FanFail LE provides warnings when an overheating or fan failure occurs. Refer to the tables
below for pin denitions.
OH/Fan Fail Indicator
Status
State Denition
Off Normal
On Overheat
Flashing Fan Fail
OH/Fan Fail LED
Pin Denitions (JF1)
Pin# Denition
7 Blue LED (UID)
8 OH/Fan Fail LED
Power Fail LED
The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below
for pin denitions.
Power Fail LED
Pin Denitions (JF1)
Pin# Denition
5 3.3V
6 PWR Supply Fail
1. Front UID LED
2. OH/Fan Fail LED

46
Supe X11DPU-Z+ User's Manual
Power Button
UID LED
NIC1 Active LED
Reset Button
HDD LED
PWR LED
Reset
PWR
3.3V Stby
3.3V Stby
Ground
19
X
Ground
X
3.3V Stby
20
1 2
Ground
Power Fail LED
NIC2 Active LED
NMI
3.3V
3.3V
OH/Fan Fail LED
NIC1/NIC2 (LAN1/LAN2)
The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins
11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to
display network activity. Refer to the table below for pin denitions.
1. NIC2 LED
2. NIC1 LED
3. HDD LED
LAN1/LAN2 LED
Pin Denitions (JF1)
Pin# Denition
9 NIC 2 Activity LED
11 NIC 1 Activity LED
1
2
3
HDD LED
The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to
show hard drive activity status. Refer to the table below for pin denitions.
HDD LED
Pin Denitions (JF1)
Pins Denition
13 3.3V Stdby
14 HDD Active

47
Chapter 2: Installation
Power Button
UID LED
NIC1 Active LED
Reset Button
HDD LED
PWR LED
Reset
PWR
3.3V Stby
3.3V Stby
Ground
19
X
Ground
X
3.3V Stby
20
1 2
Ground
Power Fail LED
NIC2 Active LED
NMI
3.3V
3.3V
OH/Fan Fail LED
Power LED
The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below
for pin denitions.
Power LED
Pin Denitions (JF1)
Pins Denition
15 3.3V
16 PWR LED
NMI Button
The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer
to the table below for pin denitions.
NMI Button
Pin Denitions (JF1)
Pins Denition
19 Control
20 Ground
1. PWR LED
2. NMI
1
2

48
Supe X11DPU-Z+ User's Manual
BAR CODE
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IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
2.7 Connectors
Power Connector
1. PSU1
2. PSU2
3. JGPW2
4. JGPW4
1
SMCI-Proprietary Power Connectors
Two SMCI-proprietary Power Supply Unit connectors, located at PSU1/PSU2, provide main
power to your system. Please note that these power connectors are reserved for Supermicro
system use only.
2
GPU Power Connectors
JGPW2/JGPW4 are 8-pin power connectors used for onboard GPU (Graphics Processing
Unit) and video devices. Connect appropriate power cables here to provide power to your
GPU/VGA devices
3
4

49
Chapter 2: Installation
2
12V 8-pin Power Connectors
Four 12V 8-pin power connectors (JPW1/JPW2 and JPW3/JPW4) are located on the
motherboard. JPW1 and JPW2 are used for backplane devices. Refer to the table below for
pin denitions.
12V 8-pin Power
Pin Denitions
Pin# Denition
1 - 4 Ground
5 - 8 +12V
1. JPW1
2. JPW2
3. JPW3
4. JPW4
1
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BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
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JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13
NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
3
4

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IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
1. FAN1
2. FAN2
3. FAN3
4. FAN4
5. FAN5
6. FAN6
7. FAN7
8. FAN8 (Vertical)
Onboard Fan Header
This motherboard has eight system fan headers (FAN1~7 & FAN8). All these 4-pin fan
headers are backward-compatible with traditional 3-pin fans. However, onboard fan speed
control is available only when all 4-pin fans are used on the motherboard. Fan speed control
is supported by Thermal Management via IPMI 2.0 interface. See the table below for pin
denitions.
Headers
Fan Header
Pin Denitions
Pin# Denition
1 Ground (Black)
2 +12V (Red)
3 Tachometer
4 PWM Control
3
4
52 1
6
8
7

51
Chapter 2: Installation
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
JVRM1
JVRM2
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
JH HeaFI1 der
(for CPU1)
B
A
JHFI1
JH HeaFI2 der
(for CPU2)
3
4
6
5
1
F Model
Processor
H o FabricFI (H st
Interface) Sideband
Cable
HFI Carrier
Card
3. Connect the HFI rconnecto
on the HFI cable to the
onboard JHFI1 header.
IFP Cable (Optional)
Install an F model CPU
on Socket#1 (and another
F model CPU on Socket#2 if needed.
Then repeat Step 1 to Step 6
for HFI support for CPU2.)
2
2. Install an HFI card to a PCI-E slot
4. C
onnect another end of
the HFI cable to the
connector (A)
of the HFI card.
5. Connect one end of
the IFP cable to the
connector (B)
of the HFI card.
6. Connect the other end of
the IFP cable to the
F model CPU.
Host Fabric Interface (HFI) Carrier Card Sideband Headers (for
the F Model CPU Only)
Two Host Fabric Interface (HFI) carrier card headers are located at JHFI1/JHFI2 on the
motherboard. These JHFI1/JHFI2 headers are used when F model processors are installed on
the motherboard. Please note that JHFI1 is used for the F model processor installed in CPU
Socket#1, and JHFI2, used for the processors in CPU Socket#2. When only one processor is
used, please install it on CPU Socket#1 rst. Then, use an HFI sideband cable to connect the
carrier card to the JHFI header, and use an appropriate IFP (Internal-Faceplate-to-Processor)
cable (optional) to connect the carrier card to the F model processor in CPU Socket #1 for
system performance enhancement. Please follow the same steps above to enable Host
Fabric Interface support for CPU2. See the table on the next page for JHFI1/JHFI2 pin-out
denitions, and also refer to Page 34 for the installation instructions.
Notes: For the HFI carrier card to function properly, please purchase the appropriate
IFP cable(s) from Supermicro. Please refer to Supermicro's website at www.supermicro.
com for the part number of the IFP cable specied for your system.
Notes: 1. IFP Cable (*See Note above) 2. Please repeat Step 1 to Step 6 to enable HFI support for CPU2.
CPU Socket #1CPU Socket #2

52
Supe X11DPU-Z+ User's Manual
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
21
1. JHFI1 (for CPU1)
2. JHFI2 (for CPU2)
HFI Header
Pin Denitions
Pin# Description Pin# Description
1 Ground 2 SMB-HFI-0-SCL
3 HFI0-MODPRST-N 4 SMB-HFI-0-SDA
5 LED-HFI0-N 6 HFI0-RESET-N
7 Ground 8 HFI0-INT-N
9 Ground 10 SMB-HFI-1-SCL
11 HFI1-MODPRST-N 12 SMB-HFI-1-SDA
13 LED-HFI1-N 14 HFI1-RESET-N
15 Ground 16 HFI1-INT-N
17 reserved 18 P3V3
19 P2V5-PWRGD 20 P3V3
21 P2V5 22 PCIe-SMBCLK
23 Ground 24 PCIe-SMBDAT

53
Chapter 2: Installation
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
TPM Header
The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is
available from a third-party vendor. A TPM/Port 80 connector is a security device that supports
encryption and authentication in hard drives. It allows the motherboard to deny access if the
TPM associated with the hard drive is not installed in the system. See the layout below for
the location of the TPM header.
1. TPM/Port 80 Header
1
TPM/Port 80 Header
Pin Denitions
Pin # Denition Pin # Denition
1 LCLK 2 GND
3 LFRAME# 4 <(KEY)>
5 LRESET# 6 +5V (X)
7 LAD 3 8 LAD 2
9 +3.3V 10 LAD1
11 LAD0 12 GND
13 SMB_CLK 14 SMB_DAT
15 +3V_DUAL 16 SERIRQ
17 GND 18 CLKRUN# (X)
19 LPCPD# 20 LDRQ# (X)

54
Supe X11DPU-Z+ User's Manual
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13
NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
1. RAID Key
2. Serial General Purpose
Header
RAID Key Header
A RAID Key header is located at JRK1 on the motherboard. The RAID key is used to support
NVMe Solid State Device (SSD).
1
SGPIO Header
The T-SGPIO3 (Serial-Link General Purpose Input/Output) header is used for the SATA
devices to communicate with the enclosure management chip on the backplane.
SGPIO Header
Pin Denitions
Pin# Pin#Denition Denition
1 2NC NC
3 4Ground DATA Out
5 6Load Ground
7 8Clock NC
NC = No Connection
Intel RAID Key
Pin Denitions
Pin# Denition
1 Ground
2 3.3V Standby
3 Ground
4 PCH RAID Key
2

55
Chapter 2: Installation
CPLD Header
The Complex Programmable Logical Device (CPLD) header is located on JP2 on the
motherboard. Connect an appropriate cable to use this feature.
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
1. CPLD Header
2. BMC SMBus Header
1
2
BMC SMB (I2C) Header
A System Management Bus (SMBus) header for IPMI 2.0 is located at JIPMB1. Connect an
appropriate cable here to use the IPMB I2C connection on your system. Refer to the table
below for pin denitions.
External I2C Header
Pin Denitions
Pin# Denition
1 Data
2 Ground
3 Clock
4 No Connection

56
Supe X11DPU-Z+ User's Manual
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to
the table below for pin denitions.
Chassis Intrusion
Pin Denitions
Pin# Denition
1 Intrusion Input
2 Ground
1. Internal Speaker Header
2. Chassis Intrusion
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13
NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
1
2
Internl Speaker/Buzzer Header
An internal speaker/buzzer header is located on SP1. Close SP1 to use the onboard speaker
to provide audio warnings when a system error or memory error occurs. See the layout below
for location.

57
Chapter 2: Installation
NVMe SMBus Headers
NVMe SMBus (I2C) headers (JNVI2C1/2), used for PCI-E SMBus clock and data connections,
provide hot-plug support via a dedicated SMBus interface. This feature is only available for a
Supermicro complete system with an SMCI-proprietary NVMe add-on card and cable installed.
See the table below for pin denitions.
1. NVMe I2C Header 1
2. NVMe I2C Header 2
3. NVMe Connector 10
4. NVMe Connector 11
5. NVMe Connector 12
4. NVMe Connector 13
NVMe Connectors
Four NVMe connectors (NVME10/NVME11 & NVME12/NVME13) are used for high-speed
PCI-E storage devices. NVME10/NVME11 are supported by CPU1, and NVME12/NVME13
are for CPU2.
NVMe SMBus Header
Pin Denitions
Pin# Denition
1 Data
2 Ground
3 Clock
4 VCCIO
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13
NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
1
2
34
5 6

58
Supe X11DPU-Z+ User's Manual
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
1. JSD1
2. JSD2
12
SATA DOM Power Connector
The SATA Disk-On-Module (DOM) power connectors at JSD1 and JSD2 provide 5V power
to solid-state storage devices connected to the SATA ports. See the table below for pin
denitions.
DOM PWR
Pin Denitions
Pin# Denition
1 +5V
2 Ground
3 Ground

59
Chapter 2: Installation
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
I-SATA 3.0 and S-SATA 3.0 Ports
The X11DPU-Z+ has eight I-SATA 3.0 ports (I-SATA0-3, I-SATA4-7) and two S-SATA (S-SATA4,
S-SATA5) on the motherboard. These SATA ports are supported by the Intel PCH (C621).
S-SATA4/S-SATA5 support Supermicro SuperDOMs (Disk_on_Modules), which are yellow
SATA DOM connectors with power pins built in, and do not require external power cables.
Supermicro SuperDOMs are backward-compatible with regular SATA HDDs or SATA DOMs
that need external power cables. All these SATA ports provide serial-link signal connections,
which are faster than the connections of Parallel ATA.
1. I-SATA0-3
2. I-SATA4-7
3. S-SATA4
4. S-SATA5
34
2
1

60
Supe X11DPU-Z+ User's Manual
2.7 Jumper Settings
How Jumpers Work
To modify the operation of the motherboard, jumpers can be used to choose between optional
settings. Jumpers create shorts between two pins to change the function of the connector.
Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram
at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.
Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.
Connector
Pins
Jumper
Setting
3 2 1
3 2 1
VGA Port Enable/Disable
Jumper JPG1 is used to enable or disable the VGA port on the
I/O back panel. Close pin 1 and pin 2 for VGA support. The
default setting is Enabled.
Jumper Setting Denition
Pins 1-2 Enabled
Pins 2-3 Disabled
1. VGA Enable/Disable
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
1

61
Chapter 2: Installation
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
CMOS Clear
JBT1 is used to clear CMOS, which will also clear the passwords, if any. Instead of pins,
this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS.
To Clear CMOS
1. First power down the system and unplug the power cord(s).
2. Remove the cover of the chassis to access the motherboard.
3. Remove the onboard battery from the motherboard.
4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.
5. Remove the screwdriver (or shorting device).
6. Replace the cover, reconnect the power cord(s), and power on the system.
Note: Clearing CMOS will also clear all passwords.
Do not use the PW_ON connector to clear CMOS.
JBT1 contact pads
1. Clear CMOS
1

62
Supe X11DPU-Z+ User's Manual
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
1. Manufacturing Mode Select
Manufacturing Mode Select
Close JPME1 to bypass SPI ash security and force the system to use the Manufacturing
Mode, which will allow you to ash the system rmware from a host server to modify system
settings. See the table below for jumper settings.
Manufacturing Mode Select
Jumper Settings
Jumper Setting Denition
Pins 1-2 Normal (Default)
Pins 2-3 Manufacturing Mode
1

63
Chapter 2: Installation
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
Watch Dog Timer
JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default
setting is Reset.
Note: When Watch Dog is enabled, the user needs to write their own application
software to disable it.
Watch Dog
Jumper Settings
Jumper Setting Denition
Pins 1-2 Reset
Pins 2-3 NMI
Open Disabled
1. Watch Dog
1

64
Supe X11DPU-Z+ User's Manual
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
2.8 LED Indicators
1. IPMI LAN LEDs
IPMI-Dedicated LAN LEDs
An IPMI-dedicated LAN is located on the I/O Backplane of the motherboard. The LED indicator
on the right indicates activity, while the yellow LED on the left indicates the status of the IPMI
LED connection. See the tables below for more information.
IPMI LAN
Link LED Activity LED
1
IPMI LAN Activity LED (Right)
LED Color/State Denition
Activity (Right) Green: Blinking 100 Mbps
Activity (Right) Amber: Blinking 1G
IPMI LAN Link LED (Left)
LED Color Denition
Link Solid: Yellow
1

65
Chapter 2: Installation
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13NVME12
JHFI1JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
BMC Heartbeat LED
LEDM1 is the BMC heartbeat LED. When the LED is blinking green, BMC is functioning
normally. See the table below for the LED status.
Onboard Power LED Indicator
LED Color Denition
Green:
Blinking BMC Normal
1. BMC Heartbeat LED
2. Onboard Power LED
Onboard Power LED
The Onboard Power LED is located at LE2 on the motherboard. When this LED is on, the
system is on. Be sure to turn off the system and unplug the power cord before removing or
installing components. Refer to the table below for more information.
Onboard Power LED Indicator
LED Color Denition
Off
System Off
(power cable not
connected)
Green System On
2
1

66
Supe X11DPU-Z+ User's Manual
BAR CODE
BIOS
LICENSE
IPMI CODE
BP PWR2 BP PWR1
P1-DIMMC1
I-SATA4~7
P1-DIMMB2
I-SATA0~3
P1-DIMMB1
P1-DIMMC2
P1-DIMMA1
P1-DIMMA2
CPU1_PORT2C
SXB3B
JWD1
CPU1_PORT3C
CPU1_PORT3A CPU1_PORT2A
SXB3CCPU1_PORT1A
SXB3A
P1-DIMMD2
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMF1
P1-DIMMF2
USB0/1(3.0)
CPU2
CPU1
BATTERY
COM1
IPMI_LAN
UID
USB3/4(3.0)
P2-DIMMC2
P2-DIMMC1
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
CPU2_DMI
PCH_PORT1
CPU2_PORT1A
SXB2
VGA
SXB1C
CPU2_PORT2A
CPU2_PORT2C
SXB1A
P2-DIMMD2
P2-DIMMD1
P2-DIMME2
P2-DIMME1
P2-DIMMF1
P2-DIMMF2
USB2(3.0)
GPU PWR2
X11DPU-Z+
REV:1.01
JS1
JHFI2
JSD1
JSD2
S-SATA4
S-SATA5
NVME13
NVME12
JHFI1
JNVI2C1 NVME11
NVME10
JPW2
T-SGPIO3
FAN4
JRK1
JSDCARD1
JBT1
BT1
LEDM1
SXB1_3
LE2
JNVI2C2
GPU PWR1
JGPW4
JGPW2
JUSB3
FAN8
LED1
JUSBA1
SP1
JIPMB1
FAN1
FAN2
FAN3
FAN5
FAN6
FAN7
JPG1
JPME1
JF1
SXB1_2
SXB3_2
PSU1
JPW3
JPW1
JPW4
SXB3_3
SXB1_1
SXB3_1
JL1
JUIDB2
JTPM1
JS2
CPU2_PORT3ASXB1B
CPU2_PORT3C
BMC
BIOS
PCH
PSU2
UID LED
LED Indicator
LED Color Denition
Blue: On Unit Identied
Unit ID LED
A rear UID LED indicator at LED1 is located next to the UID switch on the motherboard. This
UID indicator provides easy identication of a system unit that might be in need of service.
1. UID LED
1

Chapter 3: Troubleshooting
67
Chapter 3
Troubleshooting
3.1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.
Before Power On
1. Check that the power LED on the motherboard is on.
2. Make sure that the power connector is connected to your power supply.
3. Make sure that no short circuits exist between the motherboard and chassis.
4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.
5. Remove all add-on cards.
6. Install a CPU, a heatsink*, and connect the internal speaker and the power LED to the
motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully
seated.)
7. Use the correct type of onboard CMOS battery as recommended by the manufacturer.
To avoid possible explosion, do not install the CMOS battery upside down.
No Power
1. Make sure that no short circuits exist between the motherboard and the chassis.
2. Verify that all jumpers are set to their default positions.
3. Check that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

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No Video
1. If the power is on but you have no video, remove all the add-on cards and cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on
beep codes.
System Boot Failure
If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:
1. Check for any error beep from the motherboard speaker.
• If there is no error beep, try to turn on the system without DIMM modules installed. If there
is still no error beep, replace the motherboard.
• If there are error beeps, clear the CMOS settings by unplugging the power cord and con-
tacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.
2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.
3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this Chapter.
Memory Errors
1. Make sure that the DIMM modules are properly and fully installed.
2. Conrm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.
3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.
4. Check the power supply voltage 115V/230V switch.

Chapter 3: Troubleshooting
69
Losing the System's Setup Conguration
1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.6 for
details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the setup conguration problem, contact your vendor for
repairs.
When the System Becomes Unstable
A. If the system becomes unstable during or after OS installation, check the following:
1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.
Note: Refer to the product page on our website at http://www.supermicro.com for
memory and CPU support and updates.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.
4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.
5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.
6. Proper software support: Make sure that the correct drivers are used.
B. If the system becomes unstable before or during OS installation, check the following:
1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD.
2. Cable connection: Check to make sure that all cables are connected and working
properly.

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3. Using the minimum conguration for troubleshooting: Remove all unnecessary
components (starting with add-on cards rst), and use the minimum conguration (but
with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.
4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.
6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

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71
3.2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, note that as a
motherboard manufacturer, we do not sell directly to end-users, so it is best to rst check with
your distributor or reseller for troubleshooting services. They should know of any possible
problem(s) with the specic system conguration that was sold to you.
1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.
2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be
ashed depending on the modications to the boot block code.
3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your system rst
boots up)
• System conguration
An example of a Technical Support form is posted on our website.
Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.

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3.3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The X11DPU-Z+ motherboard supports up to 3TB of 3DS LRDIMM/LRDIMM/3DS
RDIMM/RDIMM/NV-DIMM DDR4 ECC 2666/2400/2133 Mhz in 24 DIMM slots. See Section
2.4 for details on installing memory.
Question: How do I update my BIOS?
Answer: It is recommended that you upgrade your BIOS if you are not experiencing do not
any problems with your system. Updated BIOS les are located on our website at http://www.
supermicro.com. Please check our BIOS warning message and the information on how to
update your BIOS on our website. Select your motherboard model and download the BIOS
le to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip le and the .exe le. If
you choose the zip BIOS le, please unzip the BIOS le onto a bootable USB device. Run
the batch le using the format FLASH.BAT lename.rom from your bootable USB device to
ash the BIOS. Then, your system will automatically reboot.
Question: Why can't I turn off the power using the momentary power on/off switch?
Answer: The instant power off function is controlled in BIOS by the Power Button Mode
setting. When the On/Off feature is enabled, the motherboard will have instant off capabilities
as long as the BIOS has control of the system. When the Standby or Suspend feature is
enabled or when the BIOS is not in control such as during memory count (the rst screen
that appears when the system is turned on), the momentary on/off switch must be held for
more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.

Chapter 3: Troubleshooting
73
3.4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.
3. Remove the battery.
Proper Battery Disposal
Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery
in the garbage or a public landll. Please comply with the regulations set up by your local
hazardous waste management agency to dispose of your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.
Note: When replacing a battery, be sure to only replace it with the same type.
OR

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3.5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.
For faster service, RMA authorizations may be requested online (http://www.supermicro.com/
support/rma/).
This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of
products.
During the warranty period, contact your distributor rst for any product problems.

Chapter 4: BIOS
75
Chapter 4
BIOS
4.1 Introduction
This chapter describes the AMIBIOS™ Setup utility for the X11DPU-Z+ motherboards. The
BIOS is stored on a chip and can be easily upgraded using a ash program.
Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of our website for any changes to BIOS that may not be reected in
this manual.
Starting the Setup Utility
To enter the BIOS setup utility, press the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.
The Main BIOS screen has two main frames. The left frame displays all the options that can
be congured. “Grayed-out” options cannot be congured. The right frame displays the key
legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.
A "
" indicates a submenu. Highlighting such an item and pressing the <Enter> key will open
the list of settings within that submenu.
The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during
the setup navigation process.

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4.2 Main Setup
When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can
always return to the Main setup screen by selecting the Main tab on the top of the screen. The
Main BIOS setup screen is shown below. The following Main menu items will be displayed:
System Date/System Time
Use this item to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow
keys to move between elds. The date must be entered in Day MM/DD/YYYY format. The
time is entered in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is 01/01/2014 after RTC reset.
Supermicro X11DPU-Z+
BIOS Version
This item displays the version of the BIOS ROM used in the system.
Build Date
This item displays the date when the version of the BIOS ROM used in the system was built.
CPLD Version
This item displays the version of the CPLD (Complex-Programmable Logical Device) used
in the system.

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77
Memory Information
Total Memory
This item displays the total size of memory available in the system.
4.3 Advanced Setup Congurations
Use the arrow keys to select the Advanced submenu and press <Enter> to access the
submenu items:
Warning: Take Caution when changing the Advanced settings. An incorrect value, an incorrect
DRAM frequency, or an incorrect BIOS timing setting may cause the system to malfunction.
When this occurs, restore the setting to the manufacture default setting.
Boot Feature
Quiet Boot
Use this feature to select the screen between displaying POST messages or the OEM logo
at bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are and Disabled. Enabled
Note: POST message is always displayed regardless of the item setting.

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Option ROM Messages
Use this feature to set the display mode for the Option ROM. Select Keep Current to use
the current AddOn ROM display setting. Select Force BIOS to use the Option ROM display
mode set by the system BIOS. The options are Force BIOS and Keep Current.
Bootup NumLock State
Use this feature to set the Power-on state for the Numlock key. The options are On and Off.
Wait For 'F1' If Error
Select Enabled to force the system to wait until the 'F1' key is pressed if an error occurs. The
options are Disabled and Enabled.
INT19 Trap Response
Interrupt 19 is the software interrupt that handles the boot disk function. When this item is
set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.
Re-try Boot
When EFI (Expansible Firmware Interface) Boot is selected, the system BIOS will automatically
reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to
allow the BIOS to automatically reboot the system from a Legacy boot device after an initial
boot failure. The options are , Legacy Boot, and EFI Boot.Disabled
Install Windows 7 USB support
EHCI needs to be supported in order for USB 2.0 to work properly during the installation
of Windows 7; however, EHCI support was removed from Intel Skylake Platforms. When
enabled, this feature will allow USB keyboard and mouse to work properly during installation
of Windows 7. After installation of Windows 7 and all the drivers please this feature. disable
The options are Disabled and Enabled.
Port 61h Bit-4 Emulation
Select Enabled to enable the emulation of Port 61h bit-4 toggling in SMM (System Management
Mode). The options are and Enabled.Disabled
Power Conguration
Watch Dog Function
Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more
than 5 minutes. The options are Disabled and Enabled.

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79
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off for
the system power to remain off after a power loss. Select Power-On for the system
power to be turned on after a power loss. Select Last State to allow the system to
resume its last power state before a power loss. The options are Stay-Off , Power-On,
and Last State.
Power Button Function
This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are Instant Off and 4 Seconds Override.
Throttle on Power Fail
When enabled, this feature decreases system power by throttling CPU frequency when power
supply has failed. The options are Disabled and Enabled.
CPU Conguration
Warning: Setting the wrong values in the following sections may cause the system to malfunc-
tion.
Processor Conguration
The following CPU information will be displayed:
• Processor BSP Revision
• Processor Socket
• Processor ID
• Processor Frequency
• Processor Max Ratio
• Processor Min Ratio
• Microcode Revision
• L1 Cache RAM
• L2 Cache RAM
• L3 Cache RAM

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• Processor 0 Version
• Processor 1 Version
Hyper-Threading (ALL)
Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The
options are Disable and Enable.
Execute Disable Bit (Available if supported by the OS & the CPU)
Select Enable to enable Execute Disable Bit support which will allow the processor to
designate areas in the system memory where an application code can execute and where
it cannot, thus preventing a worm or a virus from ooding illegal codes to overwhelm the
processor, damaging the system during a virus attack. The options are Disable and Enable.
(Refer to Intel and Microsoft websites for more information.)
Intel Virtualization Technology
Select Enable to use Intel Virtualization Technology which will allow the I/O device assignments
to be directly reported to the VMM (Virtual Memory Management) through the DMAR ACPI
tables. This feature offers fully-protected I/O resource-sharing across the Intel platforms,
providing the user with greater reliability, security and availability in networking and data-
sharing. The settings are Disable and Enable.
PPIN Control
Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Disable and Unlock/Enable.
Hardware Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the Level 2 (L2) cache to improve CPU performance.
The options are and Disable.Enable
Adjacent Cache Prefetch (Available when supported by the CPU)
Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select
Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Enable and
Disable.
Note: Please power off and reboot the system for the changes you've made to take
effect. Please refer to Intel’s website for detailed information.
DCU Streamer Prefetcher (Available when supported by the CPU)
If this item is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch data
streams from the cache memory to the DCU (Data Cache Unit) to speed up data accessing
and processing for CPU performance enhancement. The options are Enable and Disable.

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81
DCU IP Prefetcher
If this item is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP
addresses to improve network connectivity and system performance. The options are Enable
and Disable.
LLC Prefetch
If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are and Enable.Disable
Extended APIC (Extended Advanced Programmable Interrupt Controller)
Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are and Enable.Disable
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are and Enable.Disable
Advanced Power Management Conguration
Power Technology
This feature allows for switching between stored CPU Power Management proles. The
options are Disable, Energy Efcient and Custom.
Power Performance Tuning
The options are OS Controls EPB and BIOS controls EPB.
ENERGY_PERF_BIAS_CFG mode
This feature is made available if BIOS Controls EPB is selected in Power Conguration
Tuning. The options are Maximum Performance, Performance, Balanced Performance,
Balanced Power, Power and Extreme Performance.
CPU P State Control
SpeedStep (PStates)
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat
dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and Enable.

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EIST PSD Function (Available when SpeedStep is set to Enable)
Use this item to congure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy efcient, resulting in further energy gains. The options
are HW_ALL, SW_ALL and SW-ANY.
Turbo Mode (Available when SpeedStep is set to Enable)
Select Enable for processor cores to run faster than the frequency specied by the
manufacturer. The options are Disable and Enable.
Hardware PM (Power Management) State Control
Hardware P-States
If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
hardware will choose a P-state setting independently without OS guidance. The options
are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
CPU C State Control
Autonomous Core C-State
Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Disable
and Enable.
CPU C6 Report
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all caches is turned off. The options are Disable,
Enable, Auto.
Enhanced Halt State (C1E)
Select Enable to enable "Enhanced Halt State" support, which will signicantly reduce the
CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.

Chapter 4: BIOS
83
Package C State Control
Package C State
Use this feature to set the limit on the C-State package register. The options are C0/C1
state, C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.
CPU T State Control
Software Controlled T-States
Select Enable to support Software Controlled Throttling states for CPUs installed on the
motherboard. Such throttling states control the running time of CPUs with the goal of cooling
down CPUs and preventing them from burning out. The options are Disable and Enable.
Chipset Conguration
Warning: Setting the wrong values in the following sections may cause the system to
malfunction.
North Bridge
This feature allows the user to congure the settings for the Intel North Bridge.
UPI (Ultra Path Interconnect) Conguration
This section displays the following UPI General Conguration information:
• Number of CPU
• Number of IIO
• Current UPI Link Speed
• Current UPI Link Frequency
• UPI Global MMIO Low Base/Limit
• UPI Global MMIO High Base/Limit
• UPI PCI-E Conguration Base/Size

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Degrade Precedence
Use this feature to select the degrading precedence option for Ultra Path Interconnect
connections. Select Topology Precedent to degrade UPI features if system options are in
conict. Select Feature Precedent to degrade UPI topology if system options are in conict.
The options are Topology Precedence and Feature Precedence.
Link L0p Enable
Select Enable to enable Link L0p. The options are Disable, Enable, and Auto.
Link L1 Enable
Select Enable to enable Link L1 (Level 1 link). The options are Disable, Enable, and Auto.
IO Directory Cache (IODC)
Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating
memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the
IODC to generate snoops (instead of memory lockups) for WCiLF (Cores). The options
are Disable, , Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Auto
Remote InvItoM Hybrid AllocNonAlloc and Enable for Remote InvItoM and Remote WViLF.
SNC
Sub NUMA Clustering (SNC) is a feature that breaks up the Last Level Cache (LLC) into
clusters based on address range. Each cluster is connected to a subset of the memory
controller. Enabling SNC improves average latency and reduces memory access congestion
to achieve higher performance. Select Auto for 1-cluster or 2-clusters depending on IMC
interleave. Select Enable for Full SNC (2-clusters and 1-way IMC interleave). The options
are Disable, Enable, and Auto.
XPT Prefetch
XPT Prefetch speculatively makes a copy to the memory controller of a read request being
sent to the LLC. If the read request maps to the local memory address and the recent
memory reads are likely to miss the LLC, a speculative read is sent to the local memory
controller. The options are and Enable.Disable
KTI Prefetch
KTI Pretech enables memory read to start early on a DDR bus, where the KTI Rx path
will directly create a Memory Speculative Read command to the memory controller. The
options are Disable and Enable.
Local/Remote Threshold
This feature allows the user to set the threshold for the Interrupt Request (IRQ) signal, which
handles hardware interruptions. The features are Disable, Enable, Auto, Low, Medium,
and High.

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85
Stale AtoS
This feature optimizes A to S directory. When all snoop responses found in directory A
are found to be RspI, then all data is moved to directory S and is returned in S-state. The
options are , Enable, and Auto. Disable
LLC dead line alloc
Select Enable to optimally ll dead lines in LLC. Select Disable to never ll dead lines in
LLC. The options are Disable, Enable, and Auto.
Isoc Mode
Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements.
This feature is especially important for Virtualization Technology. The options are Disable,
Enable, and Auto.
Memory Conguration
Enforce POR
Select POR to enforce POR restrictions for DDR4 memory frequency and voltage
programming. The options are and Disable.POR
Memory Frequency
Use this feature to set the maximum memory frequency for onboard memory modules. The
options are , 1866, 2000, 2133, 2200, 2400, 2600, and 2666.Auto
Data Scrambling for NVDIMM
Select Enable to enable data scrambling for onboard NVDIMM memory to enhance system
performance and security. The options are , Disable, and Enable.Auto
Data Scrambling for DDR4
Select Enable to enable data scrambling for DDR4 memory to enhance system performance
and security. The options are , Disable, and Enable.Auto
tCCD_L Relaxation
If this feature is set to Enable, SPD (Serial Presence Detect) will override tCCD_L ("Column
to Column Delay-Long", or “Command to Command Delay-Long” on the column side.) If
this feature is set to Disable, tCCD_L will be enforced based on the memory frequency.
The options are Disable and Auto.
Enable ADR
Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are and Enable.Disable

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2X Refresh
This option allows the user to select 2X refresh mode. The options are Auto, Enabled,
and Disabled.
Page Policy
This feature allows the user to determine the desired page mode for IMC. When Auto is
selected, the memory controller will close or open pages based on the current operation.
Closed policy closes that page after reading or writing. Adaptive is similar to open page
policy, but can be dynamically modied. The default is Auto.
IMC Interleaving
This feature allows the user to congure Integrated Memory Controller (IMC) Interleaving
settings.The options are , 1-way Interleave, and 2-way Interleave. Auto
Memory Topology
This item displays the information of onboard memory modules as detected by the BIOS.
Memory RAS (Reliability_Availability_Serviceability) Conguration
Use this submenu to congure the following Memory RAS settings.
Static Virtual Lockstep Mode
Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are and Enable.Disable
Mirror Mode
Select Enable to set all 1LM/2LM memory installed in the system on the mirror mode, which
will create a duplicate copy of data stored in the memory to increase memory security, but
it will reduce the memory capacity into half. The options are Disable, Mirror Mode 1LM
and Mirror Mode 2LM.
UEFI ARM Mirror
Select Enable to support the UEFI-based address range mirroring with setup option. The
options are and Enable.Disable
Memory Rank Sparing
Select Enable to support memory-rank sparing to optimize memory performance. The
options are and Enable.Disable
Note: This item will not be available when memory mirror mode is enabled.

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Correctable Error Threshold
Use this item to enter the threshold value for correctable memory errors. The default setting
is 1.
SDDC Plus One
Select Enable for SDDC (Single Device Data Correction) Plus One support, which will
increase the reliability and serviceability of your system memory. The options are Disable
and Enable.
ADDDC (Adaptive Double Device Data Correction) Sparing
Select Enable for ADDDC sparing support to enhance memory performance. The options
are Disable and Enable.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected in a memory module and send the corrections to the requestor (the original
source). When this item is set to Enable, the IO hub will read and write back one cache line
every 16K cycles if there is no delay caused by internal processing. By using this method,
roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are
Disable and Enable.
Patrol Scrub Interval
Use this item to specify the number of hours (between 0 to 24) required for the system to
complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically.
The default setting is 24.
Note: This item is hidden when Patrol Scrub item is set to Disable.
IIO Conguration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor
will always remain clear during electric tuning. The options are Disable and Enable.
CPU1 Conguration
IOU0 (IIO PCIe Br1)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

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IOU1 (IIO PCIe Br2)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
MCP0 (IIO PCIe Br4)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x16 and Auto.
MCP1 (IIO PCIe Br5)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x16 and Auto.
CPU2 Conguration
IOU0 (IIO PCIe Br1)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (IIO PCIe Br2)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
MCP0 (IIO PCIe Br4)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x16 and Auto.
MCP1 (IIO PCIe Br5)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x16 and Auto.

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IOAT Conguration
Disable TPH (TLP Processing Hint)
TPH is used for data-tagging with a destination ID and a few important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this
item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"
to help optimize the processing of each transaction occurred in the target memory space.
The options are No and Yes.
Prioritize TPH (TLP Processing Hint)
Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate
and optimize the processing of certain transactions in the system memory. The options are
Enable and Disable.
Relaxed Ordering
Select Enable to enable Relaxed Ordering support which will allow certain transactions to
violate the strict-ordering rules of PCI and to be completed prior to other transactions that
have already been enqueued. The options are and Enable.Disable
Intel VT for Directed I/O (VT-d)
Intel® VT for Directed I/O (VT-d)
Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting
the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR
ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms,
providing greater reliability, security and availability in networking and data-sharing. The
options are Enable and Disable.
Interrupt Remapping
Select Enable for Interrupt Remapping support to enhance system performance. The
options are and Disable.Enable
PassThrough DMA
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.
ATS
Select Enable to enable ATS (Address Translation Services) support for the Non-Iscoh VT-d
engine to enhance system performance. The options are Enable and Disable.

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Posted Interrupt
Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be
sent directly from a direct-assigned device to a client machine in non-root mode to improve
virtualization efciency by simplifying interrupt migration and lessening the need of physical
interrupts. The options are Enable and Disable.
Coherency Support (Non-Isoch)
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.
Intel® VMD Technology
Intel® VMD for Volume Management Device on CPU1
VMD Cong for PStack0
Intel® VMD for Volume Management Device
Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are and Enable. Disable
*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:
CPU SLOT6 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)
Select Enable to use the Intel Volume Management Device Technology for this spe-
cic root port. The options are Disable and Enable.
CPU SLOT4 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)
Select Enable to use the Intel Volume Management Device Technology for this spe-
cic root port. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable hot plug support for PCIe root ports 1A~1D. The options
are Disable and Enable.

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VMD Cong for PStack1
Intel® VMD for Volume Management Device
Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are and Enable. Disable
*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:
CPU SLOT5 PCI-E 3.0 X16 VMD (Available when the device is detected by
the system)
Select Enable to use the Intel Volume Management Device Technology for this spe-
cic root port. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Select Enable to enable hot plug support for PCIe root ports 2A~2D. The options
are Disable and Enable.
VMD Cong for PStack2
Intel® VMD for Volume Management Device
Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are and Enable. Disable
*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:
CPU SLOT2 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)
Select Enable to use the Intel Volume Management Device Technology for this spe-
cic root port. The options are Disable and Enable.
CPU SLOT1 PCI-E 3.0 X4 VMD (Available when the device is detected by the
system)
Select Enable to use the Intel Volume Management Device Technology for this spe-
cic root port. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Select Enable to enable hot plug support for PCIe root ports 3A~3D. This will allow
the user to replace the components without shutting down the system. The options
are Disable and Enable.

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Intel® VMD for Volume Management Device on CPU2
VMD Cong for PStack2
Intel® VMD for Volume Management Device
Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are and Enable. Disable
*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:
CPU SLOT3 PCI-E 3.0 X16 VMD (Available when the device is detected by
the system)
Select Enable to enable hot plug support for the Intel Volume Management Device
Technology for this specic root port. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable hot plug support for PCIe root ports 3A~3D. The options
are Disable and Enable.
IIO-PCIE Express Global Options
PCI-E Completion Timeout Disable
Select Enable to enable PCI-E Completion Timeout support for electric tuning. The options
are Yes, No, and Per-Port.
South Bridge
The following South Bridge information will display:
• USB Module Version
• USB Devices
Legacy USB Support
Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support
if there are no legacy USB devices present. Select Disable to have all USB devices available
for EFI applications only. The options are , Disabled and Auto.Enabled
XHCI Hand-Off
This is a work-around solution for operating systems that do not support XHCI (Extensible
Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the
XHCI driver. The options are Enabled and Disabled.

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Port 60/64 Emulation
Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete
legacy USB keyboard support for the operating systems that do not support legacy USB
devices. The options are Disabled and Enabled.
Server ME (Management Engine) Conguration
This feature displays the following General ME Conguration settings.
Operational Firmware Version
Backup Firmware Version
Recovery Firmware Version
ME Firmware Status #1
ME Firmware Status #2
Current State
Error Code
PCH SATA Conguration
When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:
SATA Controller
This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Disable and Enable.
Congure SATA as (Available when the item above: SATA Controller is set to
enabled)
Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and
RAID Note: . ( This item is hidden when the sSATA Controller is Disabled.)
SATA HDD Unlock
Select Enable to unlock SATA HDD password in the OS. The options are Disable and Enable.
Aggressive Link Power Management
When this item is set to Enabled, the SATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.

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SATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"
is set to "RAID")
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.
SATA Port 0 - SATA Port 7
Hot Plug
Select Enable to support Hot-plugging for the device installed on a selected SATA port
which will allow the user to replace the device installed in the slot without shutting down
the system. The options are Enable and Disabled.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the SATA device installed on the SATA
port specied by the user to start a COMRESET initialization. The options are Enable and
Disable.
SATA Device Type
Use this item to specify if the device installed on the SATA port selected by the user should
be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive
and Solid State Drive.
PCH sSATA Conguration
When this submenu is selected, AMI BIOS automatically detects the presence of the sSATA
devices that are supported by the sSATA controller and displays the following items:
sSATA Controller
This item enables or disables the onboard sSATA controller supported by the Intel SCU. The
options are and Disable. Enable
Congure sSATA as
Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID
to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI
and RAID. (Note: This item is hidden when the sSATA Controller item is set to Disabled.)
SATA HDD Unlock
Select Enable to unlock sSATA HDD password in the OS. The options are Disable and Enable.
sSATA RSTe Boot Info (Available when the item "Congure SATA as" is set to
"RAID")
This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.

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Support Aggressive Link Power Management
When this item is set to Enable, the sSATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.
sSATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"
is set to "RAID")
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.
sSATA Port 0 - sSATA Port 5
Hot Plug
Select Enable to support Hot-plugging for the device installed on an sSATA port selected by
the user which will allow the user to replace the device installed in the slot without shutting
down the system. The options are Disable and Enabled.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the sSATA device installed on the
sSATA port specied by the user to start a COMRESET initialization. The options are
Enable and Disable.
sSATA Device Type
Use this item to specify if the device installed on the sSATA port specied by the user
should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard
Disk Drive and Solid State Drive.
PCIe/PCI/PnP Conguration
The following PCI information will be displayed:
• PCI Bus Driver Version
• PCI Devices Common Settings:
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
The options are Disabled and Enabled.
SR-IOV Support (Available if the system supports Single-Root Virtualization)
Select Enabled for Single-Root IO Virtualization support. The options are Disabled and
Enabled.

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MMIO High Base
Use this item to select the base memory size according to memory-address mapping for the
IO hub. The base memory size must be between 4032G to 4078G. The options are 56T,
40T, 24T, 16T, 4T, and 1T.
MMIO High Granularity Size
Use this item to select the high memory size according to memory-address mapping for the
IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.
PCI PERR/SERR Support
Use this feature to enable or disable the runtime event for SERR (System Error)/ PERR (PCI/
PCI-E Parity Error). The options are Disabled and Enabled.
Maximum Read Request
Select Auto for the system BIOS to automatically set the maximum size for a read request
for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.
MMCFG Base
This feature determines the lowest MMCFG (Memory-Mapped Conguration) base assigned
to PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.
NVMe Firmware Source
This feature determines the lowest MMCFG (Memory-Mapped Conguration) base assigned
to PCI devices. The options are Vendor Dened Firmware and AMI Native Support.
VGA Priority
Use this item to select the graphics device to be used as the primary video display for system
boot. The options are Auto, and Offboard.Onboard
RSC-R2UW-4RE8 SLOT(1-4) PCI-E X8 OPROM
Select Disabled to deactivate the selected slots, Legacy to activate the slot in legacy mode,
and EFI to activate the slot in EFI mode. The options are Disabled, Legacy, and EFI.
Onboard LAN Option ROM Type
Use this to select rmware type to be loaded for onboard LANs. The options are Legacy
and EFI.
Onboard NVME1/NVME2/NVME3/NVME4 Option ROM
Select EFI to allow the user to boot the computer using an EFI (Expansible Firmware Interface)
device installed on the NVME connector specied by the user. Select Legacy to allow the
user to boot the computer using a legacy device installed on the NVME connector specied
by the user. The options are Disabled, Legacy and EFI.

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Onboard Video Option ROM
Use this feature to select the Onboard Video Option ROM type. The options are Disabled,
Legacy and EFI.
Network Stack Conguration
Network Stack
Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible
Firmware Interface) for network stack support. The options are Disabled and Enabled.
*If "Network Stack" is set to Enabled, the following items will display:
Ipv4 PXE Support
Select Enabled to enable Ipv4 PXE boot support. If this feature is disabled, it will not create
the Ipv4 PXE boot option. The options are Disabled and Enabled.
Ipv4 HTTP Support
Select Enabled to enable Ipv4 HTTP boot support. If this feature is disabled, it will not create
the Ipv4 HTTP boot option. The options are and Enabled.Disabled
Ipv6 PXE Support
Select Enabled to enable Ipv6 PXE boot support. If this feature is disabled, it will not create
the Ipv6 PXE boot option. The options are Disabled and Enabled.
Ipv6 HTTP Support
Select Enabled to enable Ipv6 HTTP boot support. If this feature is disabled, it will not create
the Ipv6 HTTP boot option. The options are and Enabled.Disabled
PXE Boot Wait Time
Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The
default is 0.
Media Detect Count
Select this to assign the number of times presence of media will be checked. The default is 1.

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Super IO Conguration
Super IO Chip AST2500
Serial Port 1 Conguration
Serial Port 1
Select Enabled to enable the onboard serial port specied by the user. The options are
Disabled and Enabled.
Device Settings
This item displays the base I/O port address and the Interrupt Request address of a se-
rial port specied by the user.
Change Settings
This feature species the base I/O port address and the Interrupt Request address of
Serial Port 1. Select for the BIOS to automatically assign the base I/O and IRQ Auto
address to a serial port specied.
The options for Serial Port 1 are , (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, Auto
9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7,
9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).
Serial Port 2 Conguration
Serial Port 2
Select Enabled to enable the onboard serial port specied by the user. The options are
Enabled and Disabled.
Device Settings
This item displays the base I/O port address and the Interrupt Request address of a se-
rial port specied by the user.
Note: This item is hidden when Serial Port 2 is set to Disabled.

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Change Settings
This feature species the base I/O port address and the Interrupt Request address of
Serial Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ
address to a serial port specied. The options for Serial Port 2 are Auto, (IO=2F8h;
IRQ=3), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7,
9, 10, 11, 12).
Serial Port 2 Attribute
Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection.
The options are and COM.SOL
Serial Port Console Redirection
COM 1 Console Redirection
Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client
machine to be connected to a host machine at a remote site for networking. The options are
Disabled and Enabled.
*If the item above set to Enabled, the following items will become available for conguration:
Console Redirection Settings (for COM1)
Terminal Type
Use thid feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function
key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to
use UTF8 encoding to map Unicode characters into one or more bytes. The options are
VT100, VT100+, VT-UTF8 and ANSI.
Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirec-
tion. Make sure that the same speed is used in the host computer and the client computer.
A lower transmission speed may be required for long and busy lines. The options are
9600, 19200, 38400, 57600 and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options
are 7 (Bits) and 8 (Bits).

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Parity
A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None
if you do not want to send a parity bit with your data bits in transmission. Select Mark
to add a mark as a parity bit to be sent along with the data bits. Select Space to add a
Space as a parity bit to be sent with your data bits. The options are None, Even, Odd,
Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1
and 2.
Flow Control
Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are and Hardware RTS/CTS.None
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Disabled and Enabled.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are and Enabled.Disabled
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are and 80x25.80x24
Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6,
SCO, ESCN, and VT400.

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Redirection After BIOS Post
Use this feature to enable or disable legacy Console Redirection after BIOS POST. When
the option-Bootloader is selected, legacy Console Redirection is disabled before booting
the OS. When the option-Always Enable is selected, legacy Console Redirection remains
enabled upon OS bootup. The options are Always Enable and Bootloader.
SOL (Serial-Over-LAN) Console Redirection
Select Enabled to use the SOL port for Console Redirection. The options are Disabled and
Enabled.
*If the item above set to Enabled, the following items will become available for user's
conguration:
Console Redirection Settings (for SOL)
Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function
key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to
use UTF8 encoding to map Unicode characters into one or more bytes. The options are
VT100, VT100+, VT-UTF8 and ANSI.
Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

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Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
Flow Control
Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are and Hardware RTS/CTS.None
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Disabled and Enabled.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are and 80x25.80x24
Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.
Redirection After BIOS Post
Use this feature to enable or disable legacy Console Redirection after BIOS POST
(Power-On Self-Test). When this feature is set to Bootloader, legacy Console Redirection
is disabled before booting the OS. When this feature is set to Always Enable, legacy
Console Redirection remains enabled upon OS boot. The options are Always Enable and
Bootloader.

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Legacy Console Redirection
Legacy Serial Redirection Port
Use the feature to select the COM port to display redirection of Legacy OS and Legacy
OPROM messages. The default setting is COM1 and SOL.
Serial Port for Out-of-Band Management/Windows Emergency Management
Services (EMS)
The submenu allows the user to congure Console Redirection settings to support Out-of-
Band Serial Port management.
Console Redirection (for EMS)
Select Enabled to use a COM port selected by the user for EMS Console Redirection. The
options are and Enabled.Disabled
*If the item above set to Enabled, the following items will become available for user's
conguration:
Console Redirection Settings (EMS)
Out-of-Band Management Port
The feature selects a serial port in a client server to be used by the Windows Emergency
Management Services (EMS) to communicate with a remote host server. The options are
COM1 and SOL.
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII character set. Select VT100+ to add color and function
key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100,
VT100+, VT-UTF8 and ANSI.
Bits Per Second
This feature sets the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in both host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 57600, and 115200 (bits per second).
Flow Control
Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop data-sending when the receiving buffer

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is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are , Hardware RTS/CTS and Software Xon/Xoff.None
• Data Bits: 8
• Parity: None
• Stop Bits: 1
ACPI Settings
Use this feature to congure Advanced Conguration and Power Interface (ACPI) power
management settings for your system.
NUMA Support (Available when the OS supports this feature)
Select Enabled to enable Non-Uniform Memory Access support to enhance system
performance. The options are Disabled and Enabled.
WHEA Support
Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and
provide a common infrastructure for the system to handle hardware errors within the Windows
OS environment to reduce system crashes and to enhance system recovery and health
monitoring. The options are Disabled and Enabled.

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High Precision Timer
Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic
interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing
multimedia streams, providing smooth playback and reducing the dependency on other
timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU.
The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer.
The options are Disabled and Enabled.
Trusted Computing (Available when a TPM device is installed
and detected by the BIOS)
When a TPM (Trusted-Platform Module) device is detected in your machine, the following
information will be displayed.
• TPM2.0 Device Found
• Vendor
• Firmware Version

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Security Device Support
If this feature and the TPM jumper (JPT1) on the motherboard are both enabled, the onboard
security (TPM) device will be enabled in the BIOS to enhance data integrity and system
security. Please note that the OS will not show the security device. Neither TCG EFI protocol
nor INT1A interaction will be made available for use. If you have made changes on the setting
on this item, be sure to reboot the system for the change to take effect. The options are
Disable and . If this option is set to Enable, the following screen and items will display:Enable
• Active PCR Banks
• Available PCR Banks
Pending Operation
Use this feature to schedule a TPM-related operation to be performed by a security (TPM)
device at the next system boot to enhance system data integrity. Your system will reboot to
carry out a pending TPM operation. The options are and TPM Clear.None
Note: Your system will reboot to carry out a pending TPM operation.
Platform Hierarchy (for TPM Version 2.0 and above)
Select Enabled for TPM Platform Hierarchy support which will allow the manufacturer to utilize
the cryptographic algorithm to dene a constant key or a xed set of keys to be used for
initial system boot. This early boot code is shipped with the platform and is included in the
list of "public keys". During system boot, the platform rmware uses this trusted public key
to verify a digital signature in an attempt to manage and control the security of the platform
rmware used in a host system via a TPM device. The options are Enabled and Disabled.
Storage Hierarchy
Select Enabled for TPM Storage Hierarchy support that is intended to be used for non-privacy-
sensitive operations by the platform owner such as an IT professional or the end user. Storage
Hierarchy has an owner policy and an authorization value, both of which can be set and are
held constant (-rarely changed) through reboots. This hierarchy can be cleared or changed
independently of the other hierarchies. The options are Enabled and Disabled.
Endorsement Hierarchy
Select Enabled for Endorsement Hierarchy support, which contains separate controls to
address the user's privacy concerns because the primary keys in this hierarchy are certied
by the TPM or a manufacturer to be constrained to an authentic TPM device that is attached
to an authentic platform. A primary key can be an encrypted, and a certicate can be created
using TPM2_ ActivateCredential. It allows the user to independently enable "ag, policy, and
authorization value" without involving other hierarchies. A user with privacy concerns can
disable the endorsement hierarchy while still using the storage hierarchy for TPM applications
and permitting the platform software to use the TPM. The options are and Disabled.Enabled

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PH (Platform Hierarchy) Randomization (for TPM Version 2.0 and above)
Select Enabled for Platform Hierarchy Randomization support, which is used only during the
platform developmental stage. This feature cannot be enabled in the production platforms.
The options are and Enabled.Disabled
TXT Support
Select Enabled to enable Intel Trusted Execution Technology (TXT) support to enhance
system security and data integrity. The options are and Enabled. Disabled
Select Enabled to enable Intel Trusted Execution Technology (TXT) support to enhance
system security and data integrity. The options are and Enabled. Disabled
Note 1: If the option for this item (TXT Support) is set to Enabled, be sure to disable
EV DFX (Device Function On-Hide) support for the system to work properly. (EV DFX
is under "IIO Conguration" in the "Chipset/North Bridge" submenu).
Note 2: For more information on TPM, please refer to the TPM manual at http://www.
supermicro.com/manuals/other.
iSCSI Conguration
iSCSI Initiator Name
This feature allows the user to enter the unique name of the iSCSI Initiator in IQN format.
Once the name of the iSCSI Initiator is entered into the system, congure the proper settings
for the following items.
Add an Attempt
Delete Attempts
Change Attempt Order
Intel® Virtual RAID on CPU
When this submenu is selected and the RAID devices are detected, the BIOS screen displays
the following items:
Intel® VROC with VMD Technology 5.2.0.1029

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4.4 Event Logs
Use this feature to congure Event Log settings.
Change SMBIOS Event Log Settings
Enabling/Disabling Options
SMBIOS Event Log
Select Enabled to enable SMBIOS (System Management BIOS) Event Logging during
system boot. The options are Disabled. and Enabled.
Erasing Settings
Erase Event Log
Select Enabled to erase all error events in the SMBIOS (System Management BIOS) log
before an event logging is initialized at bootup. The options are No; Yes, Next Reset; Yes,
Every Reset.
When Log is Full
Select Erase Immediately to immediately erase all errors in the SMBIOS event log when
the event log is full. Select Do Nothing for the system to do nothing when the SMBIOS
event log is full. The options are Do Nothing and Erase Immediately.

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SMBIOS Event Log Standard Settings
Log System Boot Event
Select Enabled to log system boot events. The options are Enabled and Disabled.
MECI (Multiple Event Count Increment)
Enter the increment value for the multiple event counter. Enter a number between 1 to 255.
The default setting is 1.
METW (Multiple Event Count Time Window)
This item is used to determine how long (in minutes) should the multiple event counter wait
before generating a new event log. Enter a number between 0 to 99. The default setting
is 60.
Note: Please reboot the system for the changes to take effect.
View SMBIOS Event Log
This item allows the user to view the event in the system event log. Select this item and press
<Enter> to view the status of an event in the log. The following categories are displayed:
Date/Time/Error Code/Severity

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4.5 IPMI
Use this feature to congure Intelligent Platform Management Interface (IPMI) settings.
When you select this submenu and press the <Enter> key, the following information will
display:
• IPMI Firmware Revision: This item indicates the IPMI rmware revision used in your system.
• Status of BMC: This item indicates the status of the BMC (Baseboard Management Con-
troller) installed in your system.
System Event Log
Enabling/Disabling Options
SEL Components
Select Enabled for all system event logging at bootup. The options are Disabled and Enabled.
Erasing Settings
Erase SEL
Select Yes, On next reset to erase all system event logs upon next system reboot. Select
Yes, On every reset to erase all system event logs upon each system reboot. Select No to
keep all system event logs after each system reboot. The options are ; Yes, On next reset; No
Yes, On every reset.

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When SEL is Full
This feature allows the user to determine what the BIOS should do when the system event
log is full. Select Erase Immediately to erase all events in the log when the system event log
is full. The options are and Erase Immediately.Do Nothing
Note: After making changes on a setting, be sure to reboot the system for the changes
to take effect.
BMC Network Conguration
BMC Network Conguration
Congure IPV4 Support
This section displays conguration features for IPV4 support.
IPMI LAN Selection
This item displays the IPMI LAN setting. The default setting is Failover.
IPMI Network Link Status
This item displays the IPMI Network Link status. The default setting is Shared LAN.
Update IPMI LAN Conguration
Select Yes for the BIOS to implement all IP/MAC address changes at the next system boot.
The options are No and Yes.
*If the item above is set to Yes, the following item will become available for conguration:
Conguration Address Source
This feature allows the user to select the source of the IP address for this computer. If Static
is selected, you will need to know the IP address of this computer and enter it to the system
manually in the eld. If DHCP is selected, the BIOS will search for a DHCP (Dynamic Host
Conguration Protocol) server in the network that is attached to and request the next available
IP address for this computer. The options are DHCP and Static.
*If the item above is set to Static, the following items will become available for
conguration:
Station IP Address
This item displays the Station IP address for this computer. This should be in decimal and in
dotted quad form (i.e., 192.168.10.253).
Subnet Mask
This item displays the sub-network that this computer belongs to. The value of each three-
digit number separated by dots should not exceed 255.

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Station MAC Address
This item displays the Station MAC address for this computer. Mac addresses are 6 two-digit
hexadecimal numbers.
Gateway IP Address
This item displays the Gateway IP address for this computer. This should be in decimal and
in dotted quad form (i.e., 172.31.0.1).
VLAN
This item displays the virtual LAN settings. The options are Disable and Enable.
Congure IPV6 Support
This section displays conguration features for IPV6 support.
LAN Channel 1
IPV6 Support
Use this feature to enable IPV6 support. The options are Enabled and Disabled.
Conguration Address Source
This feature allows the user to select the source of the IP address for this computer. If Static
is selected, you will need to know the IP address of this computer and enter it to the system
manually in the eld. If DHCP is selected, the BIOS will search for a DHCP (Dynamic Host
Conguration Protocol) server in the network that is attached to and request the next available
IP address for this computer. The options are , Static, and DHCP. Unspecied
*If the item above is set to Static, the following items will become available for
conguration:
• Station IPV6 Address
• Prex Length
• IPV6 Router1 IP Address
Update IPMI LAN Conguration
Select Yes for the BIOS to implement all IP/MAC address changes at the next system boot.
The options are and Yes. If this option is set to Yes, the following items will activate:No
Conguration Address Source
Use this item to select the IP address source for this computer. If Static is selected, you will
need to know the IP address of this computer and enter it to the system manually in the eld.
Entry elds for Station IP Address, Subnet Mask and Gateway IP Address will be activated. If
DHCP is selected, AMI BIOS will search for a DHCP (Dynamic Host Conguration Protocol)

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113
4.6 Security Settings
This menu allows the user to congure the following security settings for the system.
Administrator Password
Use this feature to set the administrator password which is required to enter the BIOS setup
utility. The length of the password should be from 3 characters to 20 characters long.
User Password
Use this feature to set the user password which is required to enter the BIOS setup utility.
The length of the password should be from 3 characters to 20 characters long.
Password Check
Select Setup for the system to check for a password at Setup. Select Always for the system
to check for a password at bootup or upon entering the BIOS Setup utility. The options are
Setup and Always.
Secure Boot
When you select this submenu and press the <Enter> key, the following items will display:
• System Mode
• Secure Boot
• Vendor Keys

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Secure Boot
If this item is set to Enabled, Secure Boot will be activated when a Platform Key (PK) is
entered. A Platform Key is a security key used to manage the security settings of the platform
rmware used in your system. The options are Disabled and Enabled.
Secure Boot Mode
Use this feature to select the desired secure boot mode for the system. The options are
Standard and Custom.
CSM Support
Use this feature to select the desired secure boot mode for the system. The options are
Disabled and Enabled.
Key Management
Provision Factory Defaults
Select Enabled to install all manufacturer default keys for the following system security
settings. The options are Disabled and Enabled.
Enroll all Factor Default Keys
Select Yes to install all manufacturer defaults for the following system security settings. The
options are and No. Yes
Enroll EFI Image
Select this item and press <Enter> to select an EFI (Extensible Firmware Interface) image
for the system to operate in Secure Boot mode.
Save All Secure Boot Variables
This feature allows the user to set and save the secure boot key variables specied by the
user.
Secure Boot Variable/Size/Key#/Key Sources
Platform Key (PK)
This feature allows the user to enter and congure a set of values to be used as a platform
rmware key for the system. This set of values also indicate the size, the keys numbers,
and the key source of the Platform Key. The options are , Set New, and Erase.Save to File

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Key Exchange Keys
This feature allows the user to enter and congure a set of values to be used as a Key-
Exchange-Keys for the system. This set of values also indicate the size, the keys numbers,
and the key source of the Key-Exchange-Keys. The options are Save to File, Set New, and
Erase.
Authorized Signatures
This feature allows the user to enter and congure a set of values to be used as Authorized
Signatures for the system. This set of values also indicate the size, the keys numbers, and
the key source of the Authorized Signatures. The options are Set New and Append.
Secure Boot Variable/Size/Key#/Key Sources The options are , Set New, and Save to File
Erase.
Forbidden Signatures
This feature allows the user to enter and congure a set of values to be used as Forbidden
Signatures for the system. This set of values also indicate the size, the keys numbers, and the
key source of the Forbidden Signatures. The options are Save to File, Set New, and Erase.
Authorized TimeStamps
This feature allows the user to set and save the timestamps for Authorized Signatures to
indicate when these signatures were entered into the system. The options are Save to File,
Set New, and Erase.
OsRecovery Signatures
This feature allows the user to set and save the Authorized Signatures used for OS recovery.
The options are , Set New, and Erase.Save to File

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4.7 Boot Settings
Use this feature to congure Boot Settings:
Boot Mode Select
Use this feature to select the type of devices that the system is going to boot from. The options
are Legacy, UEFI (Unied Extensible Firmware Interface), and Dual.
Legacy to EFI support
The options are and Enabled. Disabled
Fixed Boot Order Priorities
This feature prioritizes the order of a bootable device from which the system will boot. Press
<Enter> on each entry from top to bottom to select devices. When the item above -"Boot
Mode Select" is set to Dual (default), the following items will be displayed for conguration:
• Boot Option #1 - Boot Option #17
When the item above -"Boot Mode Select" is set to Legacy, the following items will be
displayed for conguration:
• Boot Option #1 - Boot Option #8
When the item above -"Boot Mode Select" is set to UEFI, the following items will be displayed
for conguration:
• Boot Option #1 - Boot Option #9

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Delete Boot Option
Use this feature to select a boot device to delete from the boot priority list.
Delete Boot Option
Use this feature to remove an EFI boot option from the boot priority list.
UEFI Application Boot Priorities
Use this feature to organize system boot order.
Boot Option #1
Enable/Disable this boot option.

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4.8 Save & Exit
Select the Save & Exit tab from the BIOS setup screen to congure the settings below.
Save Options
Discard Changes and Exit
Select this option to quit the BIOS setup without making any permanent changes to the
system conguration and reboot the computer. Select Discard Changes and Exit from the
Exit menu and press <Enter>.
Save Changes and Reset
When you have completed the system conguration changes, select this option to leave the
BIOS setup utility and reboot the computer for the new system conguration parameters to
take effect. Select Save Changes and Exit from the Exit menu and press <Enter>.
Save Changes
When you have completed the system conguration changes, select this option to save all
changes made. This will not reset (reboot) the system.
Discard Changes
Select this option and press <Enter> to discard all the changes and return to the AMI BIOS
setup utility.

Chapter 4: BIOS
119
Default Options
Restore Optimized Defaults
To set this feature, select Restore Defaults from the Exit menu and press <Enter> to load
manufacturer default settings which are intended for maximum system performance but not
for maximum stability.
Save As User Defaults
To set this feature, select Save as User Defaults from the Exit menu and press <Enter>. This
enables the user to save any changes to the BIOS setup for future use.
Restore User Defaults
To set this feature, select Restore User Defaults from the Exit menu and press <Enter>. Use
this feature to retrieve user-dened settings that were saved previously.
Boot Override
UEFI: Built-in EFI Shell
This feature allows the user to override the Boot priorities sequence in the Boot menu, and
immediately boot the system with a device specied by the user instead of the one specied
in the boot list. This is a one-time override.

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Appendix A
BIOS Codes
A.1 BIOS Error POST (Beep) Codes
During the POST (Power-On Self-Test) routines, which are performed each time the system
is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to continue the boot-up
process. The error messages normally appear on the screen.
Fatal errors are those which will not allow the system to continue the boot-up procedure. If
a fatal error occurs, you should consult with your system manufacturer for possible repairs.
These fatal errors are usually communicated through a series of audible beeps. The numbers
on the fatal error list (on the following page) correspond to the number of beeps for the
corresponding error. All errors listed, with the exception of Beep Code 8, are fatal errors.
BIOS Beep (POST) Codes
Beep Code Error Message Description
1 beep Circuits have been reset (Ready to power up)Refresh
5 short, 1 long Memory error No memory detected in system
5 long, 2 short Display memory read/write error Video adapter missing or with faulty memory
1 long continuous System OH System overheat condition

Appendix A: BIOS Codes
121
A.2 Additional BIOS POST Codes
The AMI BIOS supplies additional checkpoint codes, which are documented online at http://
www.supermicro.com/support/manuals/ ("AMI BIOS POST Codes User's Guide").
When BIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h.
If the computer cannot complete the boot process, a diagnostic card can be attached to the
computer to read I/O port 0080h (Supermicro p/n AOC-LPC80-20).
For information on AMI updates, please refer to http://www.ami.com/products/.

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Appendix B
Software Installation
B.1 Installing Software Programs
The Supermicro FTP site contains drivers and utilities for your system at ftp://ftp.supermicro.
com. Some of these must be installed, such as the chipset driver.
After accessing the FTP site, go into the CDR_Images directory and locate the ISO le for
your motherboard. Download this le to create a DVD of the drivers and utilities it contains.
(You may also use a utility to extract the ISO le if preferred.)
After creating a DVD with the ISO les, insert the disk into the DVD drive on your system
and the display shown in Figure B-1 should appear.
Another option is to go to the Supermicro website at http://www.supermicro.com/products/.
Find the product page for your motherboard here, where you may download individual drivers
and utilities to your hard drive or a USB ash drive and install from there.
Note: To install the Windows OS, please refer to the instructions posted on our website
at http://www.supermicro.com/support/manuals/.
Figure B-1. Driver/Tool Installation Display Screen

Appendix B: Software Installation
123
Click the icons showing a hand writing on the paper to view the readme les for each item.
Click a computer icon to the right of an item to install an item (from top to the bottom) one
at a time. After installing each item, you must reboot the system before proceeding with the
next item on the list. The bottom icon with a DVD on it allows you to view the entire contents
of the DVD.
When making a storage driver diskette by booting into a driver DVD, please set the SATA
Conguration to "Compatible Mode" and congure SATA as IDE in the BIOS Setup. After
making the driver diskette, be sure to change the SATA settings back to your original settings.
B.2 SuperDoctor ® 5
The Supermicro SuperDoctor 5 is a hardware monitoring program that functions in a
command-line or web-based interface in Windows and Linux operating systems. The program
monitors system health information such as CPU temperature, system voltages, system
power consumption, fan speed, and provides alerts via email or Simple Network Management
Protocol (SNMP).
SuperDoctor 5 comes in local and remote management versions and can be used with
Nagios to maximize your system monitoring needs. With SuperDoctor 5 Management Server
(SSM Server), you can remotely control power on/off and reset chassis intrusion for multiple
systems with SuperDoctor 5 or IPMI. SD5 Management Server monitors HTTP, FTP, and
SMTP services to optimize the efciency of your operation.
Note: The default Username and Password for SuperDoctor 5 is ADMIN / ADMIN.
Note: The SuperDoctor 5 program and user’s manual can be downloaded from the
Supermicro website at http://www.supermicro.com/products/nfo/sms_sd5.cfm.
Figure B-2. SuperDoctor 5 Interface Display Screen (Health Information)

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Appendix C
Standardized Warning Statements
The following statements are industry standard warnings, provided to warn the user of
situations which have the potential for bodily injury. Should you have questions or experience
difculty, contact Supermicro's Technical Support department for assistance. Only certied
technicians should attempt to install or congure components.
Read this section in its entirety before installing or conguring components.
These warnings may also be found on our website at http://www.supermicro.com/about/
policies/safety_information.cfm.
Battery Handling
電池の取り扱い
電池交換が正しく行われなかった場合、破裂の危険性があります。 交換する電池はメーカーが推
奨する型、または同等のものを使用下さい。 使用済電池は製造元の指示に従って処分して下さい。
警告
电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更换原有电
池。请按制造商的说明处理废旧电池。
警告
電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有電池。請按
照製造商的說明指示處理廢棄舊電池。
Warnung
Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die Batterie nur
durch den gleichen oder vom Hersteller empfohlenen Batterietyp. Entsorgen Sie die benutzten
Batterien nach den Anweisungen des Herstellers.
Warning! There is the danger of explosion if the battery is replaced incorrectly. Replace
the battery only with the same or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer's instructions

Appendix C: Standardized Warning Statements
125
Attention
Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer que par une
pile de type semblable ou équivalent, recommandée par le fabricant. Jeter les piles usagées
conformément aux instructions du fabricant.
Waarschuwing
Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de batterij
slechts met hetzelfde of een equivalent type die door de fabrikant aanbevolen wordt. Gebruikte
batterijen dienen overeenkomstig fabrieksvoorschriften afgevoerd te worden.
!
.
.
.
¡Advertencia!
Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Reemplazar la
batería exclusivamente con el mismo tipo o el equivalente recomendado por el fabricante.
Desechar las baterías gastadas según las instrucciones del fabricante.
!הרהזא
ףילחהל שי .הניקת אל ךרדב הפלחוהו הדימב הללוסה לש ץוציפ תנכס ת
.תצלמומ ןרצי תרבחמ םאותה גוסב הללוסה תא
.ןרציה תוארוה יפל עצבל שי תושמושמה תוללוסה קוליס

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Product Disposal
製品の廃棄
この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要があります。
警告
本产品的废弃处理应根据所有国家的法律和规章进行。
警告
本產品的廢棄處理應根據所有國家的法律和規章進行。
Warnung
Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen des Landes
erfolgen.
¡Advertencia!
Al deshacerse por completo de este producto debe seguir todas las leyes y reglamentos
nacionales.
Attention
La mise au rebut ou le recyclage de ce produit sont généralement soumis à des lois et/ou
directives de respect de l'environnement. Renseignez-vous auprès de l'organisme compétent.
Waarschuwing
De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming met alle
nationale wetten en reglementen.
!
.
Warning! Ultimate disposal of this product should be handled according to all national
laws and regulations.
רצומה קוליס
!הרהזא
.הנידמה יקוחו תויחנהל םאתהב תויהל בייח הז רצומ לש יפוס קול

Appendix D: UEFI BIOS Recovery
127
Appendix D
UEFI BIOS Recovery
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue. Flashing
the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro
be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS
update. If you need to update the BIOS, do not shut down or reset the system while the BIOS
is updating to avoid possible boot failure.
D.1 Overview
The Unied Extensible Firmware Interface (UEFI) provides a software-based interface
between the operating system and the platform rmware in the pre-boot environment. The
UEFI specication supports an architecture-independent mechanism that will allow the UEFI
OS loader stored in an add-on card to boot the system. The UEFI offers clean, hands-off
management to a computer during system boot.
D.2 Recovering the UEFI BIOS Image
A UEFI BIOS ash chip consists of a recovery BIOS block and a main BIOS block (a main
BIOS image). The recovery block contains critical BIOS codes, including memory detection
and recovery codes for the user to ash a healthy BIOS image if the original main BIOS image
is corrupted. When the system power is turned on, the recovery block codes execute rst.
Once this process is complete, the main BIOS code will continue with system initialization
and the remaining POST (Power-On Self-Test) routines.
Note 1: Follow the BIOS recovery instructions below for BIOS recovery when the main
BIOS block crashes.
Note 2: When the BIOS recovery block crashes, you will need to follow the procedures
to make a Returned Merchandise Authorization (RMA) request. (For a RMA request,
please see section 3.5 for more information). Also, you may use the Supermicro Up-
date Manager (SUM) Out-of-Band (OOB) (https://www.supermicro.com.tw/products/
nfo/SMS_SUM.cfm) to reash the BIOS.

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Super X11DPU-Z+ User's Manual
D.3 Recovering the Main BIOS Block with a USB Device
This feature allows the user to recover the main BIOS image using a USB-attached device
without additional utilities used. A USB ash device such as a USB Flash Drive, or a USB
CD/DVD ROM device can be used for this purpose. However, a USB Hard Disk drive cannot
be used for BIOS recovery at this time.
The le system supported by the recovery block is FAT (including FAT12, FAT16, and FAT32)
which is installed on a bootable or non-bootable USB-attached device. However, the BIOS
might need several minutes to locate the SUPER.ROM le if the media size becomes too
large due to the huge volumes of folders and les stored in the device.
To perform UEFI BIOS recovery using a USB-attached device, follow the instructions below.
1. Using a different machine, copy the "Super.ROM" binary image le into the Root "\"
directory of a USB device or a writable CD/DVD.
Notes: 1. If you cannot locate the "Super.ROM" le in your drive disk, visit our website
at www.supermicro.com to download the BIOS package. Extract the BIOS binary im-
age into a USB ash device and rename it "Super.ROM" for the BIOS recovery use. 2.
Before recovering the main BIOS image, conrm that the "Super.ROM" binary image
le you download is the same version or a close version meant for your motherboard.

Appendix D: UEFI BIOS Recovery
129
2. Insert the USB device that contains the new BIOS image ("Super.ROM") into your USB
drive and reset the system when the following screen appears.
3. After locating the healthy BIOS binary image, the system will enter the BIOS Recovery
menu as shown below.
Note: At this point, you may decide if you want to start the BIOS recovery. If you decide
to proceed with BIOS recovery, follow the procedures below.

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Super X11DPU-Z+ User's Manual
Note: Do not interrupt the BIOS ashing process until it has completed.
5. After the BIOS recovery process is complete, press any key to reboot the system.
6. Using a different system, extract the BIOS package into a USB ash drive.
7. Press <Del> continuously during system boot to enter the BIOS Setup utility. From the
top of the tool bar, select Boot to enter the submenu. From the submenu list, select Boot
Option #1 as shown below. Then, set Boot Option #1 to [UEFI AP:UEFI: Built-in EFI
Shell]. Press <F4> to save the settings and exit the BIOS Setup utility.
4. When the screen as shown above displays, use the arrow keys to select the item
"Proceed with ash update" and press the <Enter> key. You will see the BIOS recovery
progress as shown in the screen below.

Appendix D: UEFI BIOS Recovery
131
8. When the UEFI Shell prompt appears, type fs# to change the device directory path. Go
to the directory that contains the BIOS package you extracted earlier from Step 6. Enter
ash.nsh BIOSname.### at the prompt to start the BIOS update process.
Note: Do not interrupt this process until the BIOS ashing is complete.
9. The screen above indicates that the BIOS update process is complete. When you see
the screen above, unplug the AC power cable from the power supply, clear CMOS, and
plug the AC power cable in the power supply again to power on the system.
10. Press <Del> continuously to enter the BIOS Setup utility.
11. Press <F3> to load the default settings.
12. After loading the default settings, press <F4> to save the settings and exit the BIOS
Setup utility.
Produktspecifikationer
Varumärke: | Supermicro |
Kategori: | moderkort |
Modell: | X11DPU-Z+ |
Färg på produkten: | Zwart |
Vikt: | 500 g |
Bredd: | 60 mm |
Djup: | 25 mm |
Höjd: | 80 mm |
Maximal upplösning: | 4096 x 2160 Pixels |
Audio-ingan (L, R): | 1 |
Ljud (L,R) ut: | 1 |
Förvaringstemperatur: | -20 - 60 °C |
Stroomverbruik: | 1000 mA |
HDMI in: | 1 |
Antal HDMI-utgångar: | 1 |
Driftspänning: | 5 V |
Drifttemperatur (TT): | 0 - 40 °C |
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