Texas Instruments CD74HCT541E Bruksanvisning

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CDx4HC(T)541 High-Speed CMOS Logic Octal Buffer and Line Drivers, Three-State
1 Features
’HC540, CD74HCT540: inverting
’HC541, ’HCT541: non-inverting
Buffered inputs
Three-state outputs
Bus line driving capability
Typical propagation delay = 9 ns at VCC = 5 V,
CL = 15 pF, TA = 25
Fanout (over temperature range)
Standard outputs: 10 LSTTL loads
Bus driver outputs: 15 LSTTL loads
Wide operating temperature range: –55 to 125℃ ℃
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL
Logic ICs
HC types
2 V to 6 V operation
High noise immunity: NIL = 30%, NIH = 30% of
VCC at VCC = 5 V
HCT types
4.5 V to 5.5 V operation
Direct LSTTL input logic compatibility,
VIL = 0.8 V (max), VIH = 2 V (min)
CMOS input compatibility, II ≤ 1 μA at VOL, VOH
2 Description
The ’HC540 and CD74HCT540 are Inverting Octal
Buffers and Line Drivers with Three-State Outputs
and the capability to drive 15 LSTTL loads.
The ’HC541 and ’HCT541 are Noninverting Octal
Buffers and Line Drivers with Three-State Outputs
that can drive 15 LSTTL loads. The Output Enables
(OE1) and (OE2) control the Three-State Outputs. If
either OE1 or OE2 is HIGH the outputs will be in the
high impedance state. For data output OE1 and OE2
both must be LOW.
Device Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
CD74HC540M SOIC (20) 12.80 mm × 7.50 mm
CD74HC540E PDIP (20) 25.40 mm × 6.35 mm
CD54HC540F3A CDIP (20) 26.92 mm × 6.92 mm
CD74HC541M SOIC (20) 12.80 mm × 7.50 mm
CD74HC541E PDIP (20) 25.40 mm × 6.35 mm
CD54HC541F CDIP (20) 26.92 mm × 6.92 mm
CD74HCT540M SOIC (20) 12.80 mm × 7.50 mm
CD74HCT540E PDIP (20) 25.40 mm × 6.35 mm
CD74HCT541M SOIC (20) 12.80 mm × 7.50 mm
CD74HCT541E PDIP (20) 25.40 mm × 6.35 mm
CD54HCT541F CDIP (20) 26.92 mm × 6.92 mm
CD74HCT541PW TSSOP (20) 6.50 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Diagram
CD54HC540, CD74HC540, CD54HC541, CD74HC541
CD74HCT540, CD54HCT541, CD74HCT541
SCHS189D – JANUARY 1998 – REVISED JANUARY 2022
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Table of Contents
1 Features............................................................................1
2 Description.......................................................................1
3 Revision History.............................................................. 2
4 Pin Configuration and Functions...................................3
5 Specifications.................................................................. 4
5.1 Absolute Maximum Ratings........................................ 4
5.2 Recommended Operating Conditions.........................4
5.3 Thermal Information....................................................4
5.4 Electrical Characteristics.............................................5
5.5 Switching Characteristics............................................6
6 Parameter Measurement Information............................ 8
7 Detailed Description........................................................9
7.1 Overview.....................................................................9
7.2 Functional Block Diagram........................................... 9
7.3 Device Functional Modes............................................9
8 Power Supply Recommendations................................10
9 Layout.............................................................................10
9.1 Layout Guidelines..................................................... 10
10 Device and Documentation Support..........................11
10.1 Receiving Notification of Documentation Updates.. 11
10.2 Support Resources................................................. 11
10.3 Trademarks............................................................. 11
10.4 Electrostatic Discharge Caution.............................. 11
10.5 Glossary.................................................................. 11
11 Mechanical, Packaging, and Orderable
Information.................................................................... 11
3 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (July 2004) to Revision D (January 2022) Page
Updated the numbering, formatting, tables, figures, and cross-refrences throughout the document to reflect
modern data sheet standards............................................................................................................................. 1
CD54HC540, CD74HC540, CD54HC541, CD74HC541
CD74HCT540, CD54HCT541, CD74HCT541
SCHS189D – JANUARY 1998 – REVISED JANUARY 2022 www.ti.com
2Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: CD54HC540 CD74HC540 CD54HC541 CD74HC541 CD74HCT540 CD54HCT541
CD74HCT541
4 Pin Configuration and Functions
HC540
J, N, or DW package
20- Pin CDIP, PDIP, or SOIC
Top View
HC541
J, N, DW, or PW
20-Pin CDIP, PDIP, SOIC, or TSSOP
Top View
www.ti.com
CD54HC540, CD74HC540, CD54HC541, CD74HC541
CD74HCT540, CD54HCT541, CD74HCT541
SCHS189D – JANUARY 1998 – REVISED JANUARY 2022
Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3
Product Folder Links: CD54HC540 CD74HC540 CD54HC541 CD74HC541 CD74HCT540 CD54HCT541
CD74HCT541

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Modell: CD74HCT541E

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