Texas Instruments SN74ALS157AN Bruksanvisning

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
SDAS081C − APRIL 1982 − REVISED DECEMBER 1994
Copyright 1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
Buffered Inputs and Outputs
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These data selectors/multiplexers contain
inverters and drivers to supply full data selection
to the four output gates. A separate strobe (G)
input is provided. A 4-bit word is selected from one
of two sources and is routed to the four outputs.
The ALS157A and SN74AS157 present true
data. The ALS158 and SN74AS158 present
inverted data to minimize propagation delay time.
The SN54ALS157A and SN54ALS158 are
characterized for operation over the full military
temperature range of 55°C to 125°C. The
SN74ALS157A, SN74ALS158, SN74AS157, and
SN74AS158 are characterized for operation from
0 C.°C to 70°
FUNCTION TABLE
INPUTS OUTPUT Y
G
A /B
DATA
ALS157A
ALS158
G A /B A B
ALS157A
SN74AS157
ALS158
SN74AS158
H X X X L H
L L L X L H
L L H X H L
L HH X L L
L H X H H L
SN54ALS157A, SN54ALS158 . . . J PACKAGE
SN74ALS157A, SN74ALS158,
SN74AS157, SN74AS158 ...D OR N PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
4B
NC
4Y
3A
1B
1Y
NC
2A
2B
SN54ALS157A, SN54ALS158 . . . FK PACKAGE
(TOP VIEW)
1A
A/B
NC
3Y
3B G
2Y
GND
NC V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A/B
1A
1B
1Y
2A
2B
2Y
GND
VCC
G
4A
4B
4Y
3A
3B
3Y
NC − No internal connection
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
SDAS081C APRIL 1982 − REVISED DECEMBER 1994
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
logic symbols
G
MUX
2
1A
1
3
1B
EN
15
G1
1
1Y
4
5
2A
6
2B 2Y
7
11
3A
10
3B 3Y
9
14
4A 13
4B 4Y
12
A /B
1
G
MUX
2
1A
1
3
1B
EN
15
G1
1
1Y
4
5
2A 6
2B 2Y
7
11
3A 10
3B 3Y
9
14
4A
13
4B 4Y
12
A /B
1
ALS157A, SN74AS157
ALS158, SN74AS158
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.



SDAS081C − APRIL 1982 − REVISED DECEMBER 1994
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
logic diagrams (positive logic)
4Y
3Y
2Y
1Y
12
9
7
4
A /B
G
4B
4A
3B
3A
2B
2A
1B
1A
1
15
13
14
10
11
6
5
3
2
4Y
3Y
2Y
1Y
12
9
7
4
A /B
G
4B
4A
3B
3A
2B
2A
1B
1A
1
15
13
14
10
11
6
5
3
2
ALS157A
ALS158
4Y
3Y
2Y
1Y
12
9
7
4
A/B
G
4B
4A
3B
3A
2B
2A
1B
1A
1
15
13
14
10
11
6
5
3
2
SN74AS157 SN74AS158
4Y
3Y
2Y
1Y
12
9
7
4
A /B
G
4B
4A
3B
3A
2B
2A
1B
1A
1
15
13
14
10
11
6
5
3
2
Pin numbers shown are for the D, J, and N packages.

Produktspecifikationer

Varumärke: Texas Instruments
Kategori: Inte kategoriserad
Modell: SN74ALS157AN

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