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Supertex inc.

www.supertex.com

MD1213DB1

Doc.# DSDB-MD1213DB1

B032114

MD1213 + TC6320 Demoboard

High Speed ±100V 2A Pulser

General Description

The MD1213DB1 can drive a transducer as a single chan-

nel transmitter for ultrasound and other applications. The

demoboard consists of one MD1213 in a 12-Lead 4x4x0.9mm

QFN (K6) package, combined with Supertex’s TC6320, an

IC containing high voltage P- and N- channel FETs in a 8-

Lead SOIC package.

Logic control inputs INA, INB and OE of the MD1213 are

controlled via the six-pin head connector on the board. Due

to the fast signal rise and fall time requirement, every ground

wire of the ribbon cable must be used to connect from the

logic signal source. When OE is enabled, it should recieve

the same voltage as the logic source circuit’s power supply.

The MD1213DB1 output waveforms can be displayed direct-

ly using an oscilloscope by connecting the scope probe to

the test point TP10-1 and TP10-2 (GND). The J5 jumper can

select whether or not to connect the on-board equivalent-

load, a 220pF 200V capacitor paralleled with a 1.0kΩ, 1W

resistor. Also, a coaxial cable can be used to easily connect

to the user’s transducer.

Demoboard Features

Demonstrates one channel ultrasound transmitter►

MD1213 driving a TC6320 power MOSFET►

±2.0 A source and sink current capability►

Logic control signal input connector ►

SMA connectors for cable to a transducer►

1.8 to 3.3V CMOS logic interface►

Designing a Pulser with the MD1213

Low input capacitance and fast switching speed are the

important features of the MD1213’s input stage. Its logic inputs

have an input impedance of about 20kΩ in parallel with 5pF,

and an internal speed of around 100MHz. The output enable

pin, OE, determines the threshold voltage for the input-channel

level translators. The input stage logic is fully compatible with

1.8V, 2.0V, 2.5V, 3.3V, or 5.0V CMOS logic. The level translators

are also compatible with these logic voltage levels, up to the

MOSFET’s gate-driver voltage level, which is typically 5.0 to

12V. When OE is low, the chip disables its’ outputs, setting

OUTA high and OUTB low. This condition helps to properly pre-

charge the AC coupling capacitors that the user can optionally

add in series with the gate-driver circuit of the external P/N-

channel FET pair.

Block Diagram

INA

INB

OUT

XDCF

2VH

INA

OUTA

INB

OUTB

Level

Shifter

2 V

GND

1.0µF

0 to 100V

MD1213

TC6320

VCC 1.0µF

0 to 100V

MD1213DB1

Supertex inc.

www.supertex.com

Doc.# DSDB-MD1213DB1

B032114

The MD1213’s output stage has separate power pins that

enable users to select the output signal’s high and low levels

independently from the supply voltages used by the main the

circuit. For example, the input logic levels could be 0V and 3.3V,

and the output levels may lie anywhere in the range of ±5.0V.

Typically, the MD1213’s output has rise and fall times of about

6.0ns when driving a 1000pF load. The output stage is capable

of peak currents of up to ±2.0A, depending on the system’s

supply voltages and load capacitance. Such high currents

are necessary to drive the input capacitances of the output

MOSFETs for fast switching speeds.

The bottom of the MD1213 12-Lead QFN package has a ther-

mal pad for power dissipation enhancement. It must externally

connect to the VSS pin on the PCB. This pad is connected

internally to the substrate of the IC circuit. It must have the low-

est potential voltage of the circuit at all times, including during

the power up or down periods, or it could cause circuit latch-up

or damage.

The Supertex TC6320 is comprised of an N- and P-channel

MOSFET pair with low threshold voltages (2.0V maximum).

This 8-Lead SO packaged device features 200V breakdown

voltage, 2.0A peak current output capabilities, and low input

capacitance (110pF maximum). The TC6320 integrates the

gate-source resistors and Zener diodes that a high voltage

pulse-driver requires. The high output current capability of the

TC6320 MOSFET speeds output waveform rise and fall time,

while their low input capacitance minimizes propagation de-

lays. During power up/down conditions, the high voltage sup-

plies VPP and VNN can inject transient voltages greater than 20V

via the output transistor’s parasitic gate-to-source capacitanc-

es. The maximum permissible gate-to-source voltage (VGS) is

±20V. The TC6320’s integral 15 - 18V Zener diodes across its’

gate and source terminals protect against such transient volt-

ages. But even if it is possible to slowly ramp the high voltage

supplies, these Zener diodes are still crucial, as they also serve

as the DC voltage restoration stage for the gates.

Note that it is possible to vary the VPP and VNN voltages with-

out making signicant changes to the circuit conguration. For

example, VNN can be 0V and VPP +200V for positive unipolar

pulses. Or VNN can be -200V and VPP 0V for a negative unipolar

pulser. If the user plans to operate the demoboard above 100V,

he must adjust the bypass capacitors (C8 or C16) to a voltage

rating of 200V. Due to the BV limitation of the TC6320, the dif-

ferential voltage (VPP-VNN) must not be greater then 200V.

Operating Supply Voltages

Symbol Parameter Min Max Units ConditionsTyp

VSS Negative drive supply -5.5 0 0 V (VDD - VSS) ≤ 13

VLVSS - VDD -2.0

VDD Positive drive supply 4.5 10 12 V (VDD - VSS) ≤ 13

VHVSS +2.0 10 VDD

VCC Logic supply 1.8 3.3 5.5 V ---

VPP TC6320 HV positive supply 0 - 100 V ---

VNN TC6320 HV negative supply -100 - 0 V ---

Board Layout

MD1213DB1

Supertex inc.

www.supertex.com

Doc.# DSDB-MD1213DB1

B032114

Current Consumption

Symbol Units ConditionsTyp

IDD 0.7 mA VDD = 12V

IH0.7 mA VH = 12V

ICC 58 mA VCC = 3.3V

IPP 2.4 mA VPP = 100V

INN 2.5 mA VNN = -100V

Waveform C, 20MHz, 8 cycles, V

SS = VL = 0 Load: 220pF//1.0k

Voltage Supply Power-Up Sequence

1 VCC Logic voltage supply, and all OE = INA = INB = Low

2 VDD Positive drive voltage for VDD1,2

3 VSS 0 or -5.0V negative bias voltage for VSS1,2 and IC substrate voltage

4 VL0 to -5.0V or VSS negative driver voltage for VL

5 VH0 to +10 or VDD positive driver voltage for VH

6 VPP /VNN +/-HV supply, slew rate not exceed 2.0V/ms

Note:

The power-down sequence should be the reverse of the power-up sequence above

Board Connector and Test Pin Description

Logic Control Signal Input Connector

Pin Name Description

J3-1 VCC Logic voltage supply for VCC

J3-2 OE MD1213 OE signal for pulser output enable, when OE=0, TC6320 P and N MOSFET both off.

J3-3 GND Logic ground

J3-4 INA ---

J3-5 GND Logic ground

J3-6 INB ---

Power Supply Connector

Pin Name Description

J1-1 VCC +3.3 logic voltage supply for VCC

J1-2 VSS 0 or -5.0V negative bias supply for VSS1, VSS2 and SUB

J1-3 VL 0 or -5.0V negative voltage supply for driver output stage

J1-4 GND Power supply ground

J1-5 VDD +10V positive driver voltage supply for VDD1 and VDD2

J1-6 VH +10 or +5.0V positive voltage supply for driver output stage

J2-1 VPP 0 to +100V positive high voltage supply with current limiting maximum to 2.0A

J2-2 GND High voltage power supply return, 0V

J2-3 VNN 0 to -100V Negative high voltage supply with current limiting maximum to -2.0A

Produktspecifikationer

Varumärke:	Microchip
Kategori:	Inte kategoriserad
Modell:	MD1213DB1
Färg på produkten:	Wit
Vikt:	1200 g
Antal lampor:	1 gloeilamp(en)
Typ lampa:	FSD
Strömlampa:	11 W
Internationell säkerhetskod (IP):	IP40
Monteringsmetod:	Opbouw
Typ av strömkälla:	AC, Battery
Beslag/fottyp:	2G7
Totala tillgångar:	11 W
skyddsklass:	II
Autonomt läge:	Ja
Lampa(r) ingår:	Ja
AC-ingångsspänning:	230 V
AC-ingångsfrekvens:	50 - 60 Hz
Ljusflöde (autonomt läge):	270 lm
Autonomi:	3 uur